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參數資料
| 型號： | CY28RS480ZXCT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Coaxial Cable; Impedance:75ohm; Conductor Size AWG:30; No. Strands x Strand Size:7 x 38; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes RoHS Compliant: Yes |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6 X 12 MM, LEAD FREE, MO-153, TSSOP2-56 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 217K |
| 代理商： | CY28RS480ZXCT |
Clock Generator for ATI
RS480 Chipset
CY28RS480
Cypress Semiconductor Corporation
Document #: 38-07638 Rev. *C
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised February 21, 2005
Features
Supports AMD
CPU
200-MHz differential CPU clock pairs
100-MHz differential SRC clocks
48-MHz USB clock
33-MHz PCI clock
66-MHz HyperTransport
clock
I
2
C support with readback capabilities
Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
3.3V power supply
56-pin SSOP and TSSOP packages
CPU
x2
SRC
x8
HTT66
x1
PCI
x1
REF
x 3
USB_48
x 1
Block Diagram
Pin Configuration
XIN
XOUT
VDD_48
USB_48
VSS_48
NC
SCLK
SDATA
NC
CLKREQ#0
CLKREQ#1
SRCT5
SRCC5
VDD_SRC
VSS_SRC
SRCT4
SRCC4
SRCT3
SRCC3
VSS_SRC
VDD_SRC
SRCT2
SRCC2
SRCT1
SRCC1
VSS_SRC
SRCST1
SRCSC1
VDD_REF
VSS_REF
REF0
SRCST0
SRCSC0
VSS_SRC1
VDD_SRC1
SRCT0
SRCC0
VDD_SRCS
VSSA
IREF
VDDA
CPUT1
CPUC1
VSS_CPU
VDD_CPU
CPUT0
CPUC0
HTT66
VSS_HTT
VDD_HTT
PCI0
VSS_PCI
VDD_PCI
REF1
REF2
VSS_SRCS
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VDD_REF
REF[0:2]
XTAL
OSC
PLL Ref Freq
XOUT
XIN
SCLK
PLL1
I
2
C
Logic
VDD_48 MHz
SDATA
VDD_PCI
PCI
Divider
Network
VDD_CPU
CPUT[0:1], CPUC[0:1],
IREF
PLL2
VDD_SRC
SRCT[0:5],SRCC[0:5]
USB_48
CPU_STP#
CLKREQ[0:1]#
C
56 SSOP/TSSOP
PD
VDD_SRCS
SRCST[0:1],SRCSC[0:1]
VDD_HTT
HTT66
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