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參數資料
| 型號： | CY2PD817 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 55K |
| 代理商： | CY2PD817 |
320-MHz 1:7 PECL to PECL/CMOS Buffer
CY2PD817
Cypress Semiconductor Corporation
Document #: 38-07574 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised August 28, 2003
Features
DC to 320-MHz operation
50-ps output-output skew
30-ps cycle-cycle jitter
2.5V power supply
LVPECL input @ 320-MHz Operation
One LVPECL output @ 320-MHz Operation
Four LVCMOS/LVTTL outputs @ 250 MHz/160 MHz
Two LVCMOS/LVTTL outputs @ 250 MHz/80 MHz
45% to 55% output duty cycle
Output divider control
Output enable/disable control
Operating temperature range: 0°C to +85°C
24-pin TSSOP
Description
The CY2PD817 is a low-voltage LVPECL-to-LVPECL and
LVCMOS fanout buffer designed for servers, data communi-
cations, and clock management.
The CY2PD817 is ideal for applications requiring mixed differ-
ential and single-ended clock distribution. This device accepts
an LVPECL input reference clock and provides one LVPECL
and six LVCMOS/LVTTL output clocks. The outputs are parti-
tioned into three banks of one, two, and four outputs. The
LVPECL output is a buffered copy of the input clock while the
LVCMOS outputs are divided by 1, 2, and 4. When CLRDIV is
set HIGH, the output dividers are set to 1. In this mode, the
maximum input frequency is limited to 250 MHz.
When OE is set HIGH, the outputs are disabled in a High-Z
state.
PCLKI
OE
÷ 4, ÷ 1
÷ 2, ÷ 1
QA[0:1]
QB[0:3]
PCLKO
PCLKO
CLRDIV
PCLKI
VDD
QA1
VSS
QB2
VSS
QB3
VDD
QA0
VSS
VDD
QB0
QB1
VDD
VSS
VDD
CLRDIV
VSS
PCLKI
PCLKI
VSS
VDD
PCLKO
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24 TSSOP
C
OE
PCLKO
Block Diagram
Pin Configuration
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相關代理商/技術參數 |
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|---|---|
| CY2PD817ZC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY2PD817ZCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:320-MHz 1:7 PECL to PECL/CMOS Buffer |
| CY2PP3115 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY2PP3115AI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:15 Differential Fanout Buffer |
| CY2PP3115AIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:15 Differential Fanout Buffer |
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