
High-Frequency Flash Programmable
PLL Die with Spread Spectrum
CY5057
Cypress Semiconductor Corporation
Document #: 38-07363 Rev. *B
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised June 30,2003
Features
Benefits
Flash-programmable die for in-package programming
of crystal oscillators
Enables quick turnaround of custom oscillators, and lowers
inventory costs through stocking blank parts. In addition, the
part can be programmed up to 100 times, which reduces
programming errors and provides an easy upgrade path for
existing designs
Enables synthesis of highly accurate and stable output clock
frequencies with zero or low PPM
Enables fine-tuning of output clock frequency by adjusting
C
Load
of the crystal
Allows the device to go into standard four- or six-pin packages.
High-resolution phase-locked loop (PLL) with 10-bit
multiplier and seven-bit divider
Flash-programmable capacitor tuning array
Simple two-pin programming interface (excluding V
DD
and V
SS
pins)
On-chip oscillator used with external 25.1-MHz funda-
mental tuned crystal
Flash-programmable spread spectrum with spread
percentages between +0.25% and +2.00%
Spread Spectrum On/Off function
Lowers cost of oscillator, as PLL can be programmed to a high
frequency using a low-frequency, low-cost crystal
Provides various spread percentage
Provides ability to enable or disable Spread Spectrum with an
external pin
Services most PC, networking, and consumer applications
Operating frequency
5–170 MHz at 3.3V ± 10%
Seven-bit linear post divider with divide options from
divide-by-2 to divide-by-127
Programmable PD# or OE pin
Programmable asynchronous or synchronous OE and
PD# modes
Low jitter output
< 200 ps (pk-pk) at 3.3V ± 10%
Controlled rise and fall times and output slew rate
Software Configuration Support
Provides flexibility in output configurations and testing
Enables low-power operation or output enable function
Provides flexibility for system applications, through selectable
instantaneous or synchronous change in outputs
Suitable for most PC, consumer, and networking applications
Has lower EMI than oscillators
Easy-to-use software support for design entry
X
Y
VDD
VDD
XOUT
XIN
PD#/OE
OUT
SSON#
VSS
VSS
NC
Vertical scribe
Horizontal scribe
Die Pad Description
Note:
Active Die Size: X = 75.0 mils / 1907
μ
m
Y = 56.2 mils / 1428
μ
m
Scribe: X (horizontal)= 2.8 mils / 71
μ
m
Y (vertical)= 3.4 mils / 86.2
μ
m
Bond pad opening: 85
μ
m x 85
μ
m
Pad pitch: 125
μ
m x 125
μ
m
(Pad center to pad center)
Wafer thickness: 11 mils TYPICAL
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