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參數(shù)資料
| 型號： | CY54FCT377TLMB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | RES NTWK, THKF, 10K OHMS 2%, 1/6W |
| 中文描述： | 8位寄存器 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 71K |
| 代理商： | CY54FCT377TLMB |
8-Bit Register
CY54/74FCT377T
SCCS023 - May1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
1CY54/74FCT377T
Features
Function, pinout and drive compatible with FCT and
F logic
FCT-C speed at 5.2 ns max. (Com’l)
FCT-A speed at 7.2 ns max. (Com’l)
Reduced V
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
Matched rise and fall times
ESD > 2000V
Fully compatible with TTL input and output logic levels
Sink Current
64 mA (Com’l),
32 mA (Mil)
Source Current
32 mA (Com’l),
12 mA (Mil)
Clock Enable for address and data synchronization
application
Eight edge-triggered D flip-flops
Extended commercial range of
40C to +85C
Functional Description
The FCT377T has eight triggered D-type flip-flops with
individual D inputs. The common buffered clock inputs (CP)
loads all flip-flops simultaneously when the Clock Enable (CE)
is LOW. The register is fully edge-triggered. The state of each
D input, one set-up time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s O out-
put. The CE input must be stable only one set-up time prior to
the LOW-to-HIGH clock transition for predictable operation.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
LogicBlock Diagram
Pin Configurations
4
8
9
10
11
12
13
7
6 5
1516 17 18
3
2
1
20
19
14
D
D
O
D6
D5
D7
CP
O
4
V
CC
O
7
GND
O5
Top View
D
LCC
CE
O
0
D
0
O
3
D
4
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
13
14
V
CC
O
7
15
SOIC/QSOP
Top View
O6
O
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
CE
GND
CP
D
Q
O
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
CE
CP
CE
D
0
O
0
D
1
O
1
D
2
O
2
D
3
O
3
D
4
O
4
D
5
O
5
D
6
O
6
D
7
O
7
D
0
CP
D
Q
O
1
CP
D
Q
O
2
CP
D
Q
O
3
CP
D
Q
O
4
CP
D
Q
O
5
CP
D
Q
O
6
CP
D
Q
O
7
Logic Symbol
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