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參數資料
| 型號： | CY62138VNLL-70BAI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 256K x 8 Static RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 70 ns, PBGA36 |
| 封裝： | 7 X 7 MM, 1.20 MM HEIGHT, FBGA-36 |
| 文件頁數： | 1/8頁 |
| 文件大?。?/td> | 410K |
| 代理商： | CY62138VNLL-70BAI |
256K x 8 Static RAM
CY62138VN MoBL
Cypress Semiconductor Corporation
Document #: 001-06513 Rev. **
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised February 2, 2006
Features
Temperature Ranges
— Industrial: –40°C to 85°C
Low voltage range:
— 2.7–3.6V
Ultra-low active power
Low standby power
Easy memory expansion with CS
1
/CS
2
and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Offered in standard non-lead-free 36-ball FBGA
package
Functional Description
The CY62138VN is a high-performance CMOS static RAM
organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life (MoBL
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that reduces power
consumption by 99% when addresses are not toggling. The
device can be put into standby mode when deselected (CS
1
HIGH or CS
2
LOW). Writing to the device is accomplished by
taking Chip Enable One (CS
1
) and Write Enable (WE) inputs
LOW and Chip Enable Two (CS
2
) HIGH. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location
specified on the address pins (A
0
through A
17
).Reading from
the device is accomplished by taking Chip Enable One (CS
1
)
and Output Enable (OE) LOW while forcing Write Enable (WE)
and Chip Enable Two (CS
2
) HIGH. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.The eight input/output pins (I/O
0
through I/O
7
) are placed in a high-impedance state when the
device is deselected (CS
1
HIGH or CS
2
LOW), the outputs are
disabled (OE HIGH), or during a write operation (CS
1
LOW,
CS
2
HIGH, and WE LOW).
PinConfiguration
FBGA
1
A
1
A
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
R
S
Data in Drivers
DOWN
WE
OE
I/O
0
CS
2
I/O
1
I/O
2
I/O
3
256K x 8
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
A
1
1
A
1
A
A
9
1
A
V
CC
A
13
A
12
A
5
CS
2
WE
A
7
I/O
4
I/O
5
A
4
NC
I/O
6
I/O
7
V
SS
A
11
A
10
A
V
SS
I/O
0
A
A
8
A
6
A
3
A
V
CC
I/O
1
I/O
2
I/O
3
A
17
NC
A
16
CS
OE
A
9
A
14
3
6
5
4
D
E
B
A
C
F
G
H
TOP View
1
2
1
15
0
1
2
Logic Block Diagram
Product Portfolio
Product
V
CC
Range
V
CC(typ)
[1]
3.0V
Speed
70 ns
Power Dissipation (Industrial)
Operating (I
cc
)
Typ.
[1]
Maximum
7 mA
15 mA
Standby (I
SB2
)
V
CC(min)
2.7V
V
CC(max)
3.6V
Typ.
[1]
1
μ
A
Maximum
15
μ
A
CY62138VN
Note:
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC
Typ, T
A
= 25°C.
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