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參數資料
| 型號： | CY7B8392 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Ethernet Coax Transceiver Interface(以太網同軸收發器接口) |
| 中文描述： | 以太網同軸電纜收發器接口（以太網同軸收發器接口） |
| 文件頁數： | 1/7頁 |
| 文件大小： | 148K |
| 代理商： | CY7B8392 |
Ethernet Coax Transceiver Interface
Functional Description
CY7B8392
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
December 1994 - Revised August 1996
Features
Compliant with IEEE802.3 10BASE5 and 10BASE2
Pin compatible with the popular 8392
Internal squelch circuit to eliminate input noise
Hybrid mode collision detect for extended distance
Automatic AUI port isolation when coaxial connector is
not present
Low power BiCMOS design
16-Pin DIP or 28-Pin PLCC
The CY7B8392 is a low power coaxial transceiver for Ethernet
10BASE5 and 10BASE2 applications. The device contains all
the circuits required to perform transmit, receive, collision de-
tection, heartbeat generation, jabber timer and attachment
unit interface (AUI) functions. In addition, the CY7B8392 fea-
tures an advanced hybrid collision detection.
The transmitter output is connected directly to a double termi-
nated 50
cable.
The CY7B8392 is fabricated with an advanced low power
BiCMOS process. Typical standby current during idle is 25 mA.
Logic Block Diagram
Pin Configurations
8392–1
HIGH PASS
EQUALIZATION
CDS
RCV
GND
LOWPASS
FILTER
LOWPASS
FILTER
LOWPASS
FILTER
+
–
CCM
+
–
TXO
RXI
V
EE
REFERENCE
CIRCUIT
RR+
RR–
1K
COLLISION
CARRIER
SENSE
AUI
DRIVER
WAVEFORM
SHAPING
+
–
DC/AC
SQUELCH
AUI
DRIVER
JABBER RESET
TIMER0.4 sec
WATCHDOG
TIMER26 ms
CLK
10 MHz
OSC
TRANSMIT
STATE
MACHINE
RECEIVE
STATE
MACHINE
HBE
PLCC
Top View
RX+
RX–
CD+
CD–
TX+
TX–
8392–2
V
EE
(NC)
RR–
V
EE
V
EE
(NC)
V
EE
(NC)
V
EE
V
EE
(NC)
1
2
3
4
5
6
7
8
12
11
10
9
13
16
15
14
CD+
CD–
RX+
V
EE
V
EE
RX–
TX+
TX–
CDS
TXO
RXI
V
EE
RR–
RR+
GND
HBE
8392–3
DIP
Top View
7B8392
4 3
1
2
28
8
9
10
11
7
6
5
22
21
20
23
24
25
1213
15
14
16
2726
1718
V
EE
(NC)
V
EE
(NC)
V
EE
V
EE
V
EE
(NC)
V
EE
(NC)
V
EE
(NC)
R
T
T
G
G
R
T
7B8392
H
N
R
C
C
C
R
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