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參數(shù)資料
| 型號(hào)： | CY7C1019B-10VI |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | HD15F WATERPROOF D-SUB BACKSHELL KIT |
| 中文描述： | 128K的× 8靜態(tài)RAM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 194K |
| 代理商： | CY7C1019B-10VI |
128K x 8 Static RAM
CY7C1019B/
CY7C10191B
Cypress Semiconductor Corporation
Document #: 38-05026 Rev. *A
3901 North First Street
San Jose
CA 95134
408-943-2600
Revised August 13, 2002
C1019V33
Features
High speed
—t
AA
= 10, 12, 15 ns
CMOS for optimum speed/power
Center power/ground pinout
Automatic power-down when deselected
Easy memory expansion with CE
and OE options
Functionally equivalent to CY7C1019
Functional Description
The CY7C1019B/10191B is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location speci-
fied on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019B/10191B is available in standard 32-pin
TSOP Type II and 400-mil-wide SOJ packages. Customers
should use part number CY7C10191B when ordering parts
with 10 ns t
AA
, and CY7C1019B when ordering 12 and 15 ns
t
AA
.
1
A
1
A
ogic Block Diagram
Pin Configurations
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
512 x 256 x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
A
1
CE
A
1
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
19
18
20
24
23
22
21
25
28
27
26
Top View
SOJ
29
32
31
30
16
17
A
7
A
1
A
2
A
3
CE
I/O
0
I/O
1
V
CC
V
SS
A
13
OE
I/O
7
I/O
6
V
SS
A
16
A
15
A
14
A
12
A
11
A
10
A
9
A
8
I/O
2
I/O
3
WE
A
0
A
4
A
5
A
6
I/O
4
V
CC
I/O
5
/ TSOPII
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1019B-10ZC | DB25 MALE SOLDER SHELL |
| CY7C1019B-12VC | SOLDER SHELLS, DB25 MALE |
| CY7C1019B-12ZC | SOLDER SHELLS FOR 25-POSITION MALE D-SUBMINIATURE CONNECTORS, PACKAGE OF 25 |
| CY7C1019B-15VC | SOLDER SHELLS FOR 25-POSITION MALE D-SUBMINIATURE CONNECTORS, PACKAGE OF 50 |
| CY7C1019B-15VI | DB25 FEMALE SOLDER SHELL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1019B-12VC | 功能描述:IC SRAM 1MBIT 12NS 32SOJ RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| CY7C1019B-12ZXC | 功能描述:IC SRAM 1MBIT 12NS 32TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| CY7C1019B-12ZXCT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1019B-15VIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 5V 1M-Bit 128K x 8 15ns 32-Pin SOJ T/R |
| CY7C1019BN-12XC | 制造商:Cypress Semiconductor 功能描述: |
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