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參數資料
| 型號： | CY7C107B-20VC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 1M x 1 Static RAM |
| 中文描述： | 1M X 1 STANDARD SRAM, 20 ns, PDSO28 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-28 |
| 文件頁數： | 1/9頁 |
| 文件大小： | 144K |
| 代理商： | CY7C107B-20VC |
1M x 1 Static RAM
CY7C107B
CY7C1007B
Cypress Semiconductor Corporation
Document #: 38-05030 Rev. **
3901 North First Street
San Jose
CA 95134
Revised September 7, 2001
408-943-2600
07B
Features
High speed
—t
AA
= 12 ns
CMOS for optimum speed/power
Automatic power-down when deselected
TTL-compatible inputs and outputs
Functional Description
The CY7C107B and CY7C1007B are high-performance
CMOS static RAMs organized as 1,048,576 words by 1 bit.
Easy memory expansion is provided by an active LOW Chip
Enable (CE) and three-state drivers. These devices have an
automatic power-down feature that reduces power consump-
tion by more than 65% when deselected.
Writing to the devices is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the input pin
(D
IN
) is written into the memory location specified on the ad-
dress pins (A
0
through A
19
).
Reading from the devices is accomplished by taking Chip En-
able (CE) LOW while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the data output (D
OUT
)
pin.
The output pin (D
OUT
) is placed in a high-impedance state
when the device is deselected (CE HIGH) or during a write
operation (CE and WE LOW).
The CY7C107B is available in a standard 400-mil-wide SOJ;
the CY7C1007B is available in a standard 300-mil-wide SOJ.
LogicBlock Diagram
Pin Configuration
SOJ
Top View
512x2048
ARRAY
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
POWER
DOWN
WE
CE
INPUT BUFFER
D
OUT
D
IN
A
4
A
3
A
2
A
1
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
19
18
17
21
24
23
22
25
28
27
26
GND
A
11
A
12
A
13
A
14
A
WE
V
CC
A
9
A
8
A
7
A
6
A
5
A
10
CE
A
0
D
IN
D
OUT
A
2
A
1
A
4
NC
A
3
NC
A
16
A
17
A
18
A
19
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
9
107B-1
107B-2
Selection Guide
7C107B-12
7C1007B-12
12
90
7C107B-15
7C1007B-15
15
80
7C107B-20
7C1007B-20
20
75
7C107B-25
7C1007B-25
25
70
7C107B-35
7C1007B-35
35
60
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum CMOS Standby
Current SB2 (mA)
2
2
2
2
2
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C107B-25VC | 1M x 1 Static RAM |
| CY7C1007B-12VC | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT08; No. of Contacts:21; Connector Shell Size:22; Connecting Termination:Solder; Circular Shell Style:Right Angle Plug |
| CY7C1007B-15VC | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT08; Number of Contacts:34; Connector Shell Size:22; Connecting Termination:Solder; Circular Shell Style:Right Angle Plug |
| CY7C1007B-15VI | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT08; Number of Contacts:34; Connector Shell Size:22; Connecting Termination:Solder; Circular Shell Style:Right Angle Plug |
| CY7C1007B-20VC | 1M x 1 Static RAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C107B-20VCT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| CY7C107B-25VC | 制造商:Rochester Electronics LLC 功能描述:1MB (1M X 1)- FAST ASYNCH SRAM - Bulk |
| CY7C107BN-15VC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 5V 1M-Bit 1M x 1 15ns 28-Pin SOJ |
| CY7C107BN-15VI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C107D-10VXI | 功能描述:靜態隨機存取存儲器 1M 512K IND FAST ASYNC 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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