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參數資料
| 型號： | CY7C245A |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 2K x 8 Reprogrammable Registered PROM |
| 中文描述： | 2K × 8可再編程注冊胎膜早破 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 227K |
| 代理商： | CY7C245A |
2K x 8 Reprogrammable Registered PROM
CY7C245A
Cypress Semiconductor Corporation
Document #: 38-04007 Rev. *D
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised November 4, 2003
Features
Windowed for reprogrammability
CMOS for optimum speed/power
High speed
—
15-ns address set-up
—
10-ns clock to output
Low power
—
330 mW (commercial) for -25 ns
—
660 mW (military)
Programmable synchronous or asynchronous output
enable
On-chip edge-triggered registers
Programmable asynchronous register (INIT)
EPROM technology, 100% programmable
Slim, 300-mil, 24-pin plastic or hermetic DIP
5V
±
10% V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for bipolar PROMs
Capable of withstanding greater than 2001V static
discharge
Functional Description
The CY7C245A is a high-performance, 2K x 8, electrically
programmable, read-only memory packaged in a slim 300-mil
plastic or hermetic DIP. The ceramic package may be
equipped with an erasure window; when exposed to UV light
the PROM is erased and can then be reprogrammed. The
memory cells utilize proven EPROM floating-gate technology
and byte-wide intelligent programming algorithms.
The CY7C245A replaces bipolar devices and offers the advan-
tages of lower power, reprogrammability, superior perfor-
mance and high programming yield. The EPROM cell requires
only 12.5V for the supervoltage, and low current requirements
allow gang programming. The EPROM cells allow each
memory location to be tested 100%, because each location is
written into, erased, and repeatedly exercised prior to encap-
sulation. Each PROM is also tested for AC performance to
guarantee that after customer programming the product will
meet AC specification limits.
The CY7C245A has an asynchronous initialize function (INIT).
This function acts as a 2049th 8-bit word loaded into the
on-chip register. It is user programmable with any desired
word, or may be used as a PRESET or CLEAR function on the
outputs. INIT is triggered by a low level, not an edge.
Logic Block Diagram
INIT
Pin Configurations
DIP Top View
1
2
3
4
5
6
7
8
9
10
11
12
16
15
17
18
19
20
24
23
22
21
13
14
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
V
CC
A
8
A
9
A
10
INIT
E/E
S
CP
O
7
O
6
O
5
O
4
O
3
PROARRAY
MULTIPLEXER
REGISTER
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
CP
CP
E/E
S
28
4
5
6
7
8
9
10
3 2 1
27
1314151617
26
25
24
23
22
21
20
19
A
V
G
A
A
O
O
0
18
O
O
O
A
0
A
4
A
3
A
2
A
1
A
INIT
S
E/E
O
7
O
6
N
N
O
A
I
P
A
PMULTIPLEXER
D
C
Q
ADDRESS
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
COLUMN
ADDROW
LCC/PLCC (Opaque only) Top View
Selection Guide
7C245A-15
15
10
120
7C245A-18
18
12
120
120
7C245A-25
25
12
90
120
7C245A-35
35
15
90
120
Unit
ns
ns
mA
mA
Minimum Address Set-up Time
Maximum Clock to Output
Maximum Operating Current Standard
Commercial
Military
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C245A-15JC | 2K x 8 Reprogrammable Registered PROM |
| CY7C245A-35WC | 2K x 8 Reprogrammable Registered PROM |
| CY7C245A-15JI | 2K x 8 Reprogrammable Registered PROM |
| CY7C245A-18DMB | 2K x 8 Reprogrammable Registered PROM |
| CY7C245A-18PC | Linear Power Supply; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C245A-15JC | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 10ns 28-Pin PLCC |
| CY7C245A-15JCT | 制造商:Cypress Semiconductor 功能描述: |
| CY7C245A-15JI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C245A-15WC | 制造商:Cypress Semiconductor 功能描述:2K X 8 REPROGRAMMABLE REGISTERED PROM 制造商:Cypress Semiconductor 功能描述:2K X 8 UVPROM, 10 ns, 24 Pin Ceramic DIP |
| CY7C245A-18DMB | 制造商:Cypress Semiconductor 功能描述:EPROM OTP 16K-Bit 2K x 8 12ns 24-Pin CDIP |
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