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參數資料
| 型號： | CY7C281A-25PC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 1K x 8 PROM |
| 中文描述： | 1K X 8 OTPROM, 25 ns, PDIP24 |
| 封裝： | 0.300 INCH, DIP-24 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 137K |
| 代理商： | CY7C281A-25PC |
1K x 8 PROM
CY7C281A
Cypress Semiconductor Corporation
Document #: 38-04003 Rev. *B
3901 North First Street
San Jose
CA 95134
Revised December 27, 2002
408-943-2600
1CY7C282A
Features
CMOS for optimum speed/power
High speed
—25 ns (Commercial)
Low power
—495 mW (Commercial)
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil DIP or 28-pin LCC
5V
±
10% V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
Functional Description
The CY7C281A is a high-performance 1024-word by 8-bit
CMOS PROMs. It is packaged in 300-mil and 600-mil-wide
packages respectively. The CY7C281A is also available in a
28-pin leadless chip carrier. The memory cells utilize proven
EPROM floating-gate technology and byte-wide intelligent
programming algorithms.
The CY7C281A is a plug-in replacements for bipolar devices
and offer the advantages of lower power, superior perfor-
mance, and programming yield. The EPROM cell requires
only 12.5V for the super voltage, and low current requirements
allow for gang programming. The EPROM cells allow each
memory location to be tested 100% because each location is
written into, erased, and repeatedly exercised prior to encap-
sulation. Each PROM is also tested for AC performance to
guarantee that after customer programming, the product will
meet DC and AC specification limits.
Reading is accomplished by placing an active LOW signal on
CS
1
and CS
2
, and active HIGH signals on CS
3
and CS
4
. The
contents of the memory location addressed by the address
lines (A
0
A
9
) will become available on the output lines
(O
0
O
7
).
Selection Guide
7C281A-25
25
100
7C281A-30
30
100
Unit
ns
mA
Maximum Access Time
Maximum Operating
Current
Commercial
LogicBlockDiagram
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12
16
15
17
18
19
20
24
23
22
21
13
14
A8
A9
CS1
CS2
CS3
CS4
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
O7
O6
O5
O4
O3
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
O7
O6
O5
O4
O3
O2
O1
O0
CS1
CS2
CS3
CS4
COLUMN
DECODER
28
4
5
6
7
8
9
10
1112
3 2 1
27
1314151617
26
25
24
23
22
21
20
19
A
VC
G
A
A
O
O
O0
18
O
O
NC
A0
A4
A3
A2
O7
O6
A
A
N
N
O
CS1
CS2
CS3
NC
LCC/PLCC
Top View
TDIP
7C281A
7C281A
ROW
DECODER
PROGRAMMABLE
ARRAY
MULTIPLEXER
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C281A-30JC | 1K x 8 PROM |
| CY7C281A-30PC | 1K x 8 PROM |
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| CY7C293A | 2K x 8 Reprogrammable PROM(2K x 8重復編程的PROM) |
| CY7C335 | Universal Synchronous EPLD(通用同步EPLD) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C281A-30PC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C281A-45PC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C287-45WC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C291-35FC | 制造商:Cypress Semiconductor 功能描述:7C291-35FC |
| CY7C291-35JC | 制造商:Cypress Semiconductor 功能描述:7C291-35JC |
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