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參數資料
| 型號： | CY7C53150L-64AI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | 3.3V Neuron Chip Network Processor |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP64 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-64 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 508K |
| 代理商： | CY7C53150L-64AI |
3.3V Neuron
Chip Network Processor
CY7C53120L8
CY7C53150L
Cypress Semiconductor Corporation
Document #: 38-10002 Rev. *E
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised November 2, 2004
Features
3.3V operation
Three 8-bit pipelined processors for concurrent
processing of application code and network traffic
Hardware UART/SPI interface
Eleven-pin I/O port programmable in 38 modes for fast
application program development. I/O port is 5V input
tolerant
Two 16-bit timer/counters for measuring and gener-
ating I/O device waveforms
Five-pin communication port that supports direct
connect and network transceiver interfaces, and
operates at 3.3V or 5V
Programmable pull-ups on IO4–IO7 and 20-mA sink
current on IO0–IO3
Unique 48-bit Neuron ID number in every device to facil-
itate network installation and management
0.35-
μ
m Flash process technology
On-chip LVD circuit with programmable trip point and
digital filter settings
Programmable Pulse Stretching reset
4,096 bytes of SRAM for buffering network data,
system, and application data storage
2.75 KBytes (CY7C53150L), 8KBytes (CY7C53120L8) of
Flash memory with on-chip charge pump for flexible
storage of configuration data and application code
Addresses up to 56 KBytes of external memory
(CY7C53150L)
16 KBytes (CY7C53120L8) of ROM containing LonTalk
network protocol firmware
Maximum input clock operation of 20MHz over –40°C
to 85°C
[1]
temperature range
64-pin TQFP package (CY7C53150L)
32-pin SOIC or 44-pin TQFP package (CY7C53120L8)
Logic Block Diagram
Media Access
Control Processor
Functional Description
The 3.3V Neuron
chip (CY7C53120L8/3150L) is a low-power
version of the 5V Neuron chip with a number of feature
enhancements. The CY7C53120L8/3150L Neuron chip imple-
ments a device for LonWorks
distributed intelligent control
networks. It incorporates, on a single chip, the necessary
communication and control functions, both in hardware and
firmware, that facilitate the design of a LonWorks device.
The CY7C53120L8/3150L supports all the functionality of the
5V CY7C531x0 Neuron chip. Additionally it features 4KBytes
of RAM, 8KBytes of Flash memory (CY7C53120L8), and
hardware UART/SPI. The CY7C53120L8/3150L has an 11-pin
configurable I/O block. The I/Os are all 5V-tolerant to allow
interfacing to TTL Compatible 5V components and microcon-
trollers.
The CY7C53120L8/3150L contains a very flexible five-pin
communication port that can be configured to interface with a
wide variety of media transceivers at a wide range of data
rates. The communication port can operate at either 3.3V or
5V. In 5V mode the communication port is completely
backward compatible with existing 5V transceivers. The most
common transceiver types are twisted-pair, powerline, RF, IR,
fiber-optics, and coaxial.
The CY7C53150L incorporates an external memory interface
that can address up to 56KBytes with 8KBytes of the address
space mapped internally. LonWorks devices that require large
application programs can take advantage of this external
memory capability.
Services at every layer of the OSI networking reference model
are implemented in the LonTalk firmware-based protocol
stored in 16KBytes ROM (CY7C53120L8),
or off-chip memory
(CY7C53150L). The firmware also contains 38 prepro-
grammed I/O drivers, simplifying application programming.
The application program is stored in the Flash memory
(CY7C53120L8) and/or off-chip memory (CY7C53150L), and
may be updated by downloading over the network.
Note:
1. Maximum junction temperature is 105°C. T
Junction
= T
Ambient
+ VI
θ
JA
. 32-pin SOIC
θ
JA
= 61.07°C/W. 44-pin TQFP
θ
JA
= 69.5°C/W. 64-pin TQFP
θ
JA
= 56.15°C/W.
Network
Processor
Application
Processor
4KBytes RAM
Communications
Port
ROM
Internal
Data Bus
(0:7)
Address Bus
(0:15)
Internal
CP4
CP0
(CY7C53120L8)
IO10
:
IO7
IO6
:
IO0
4-pin UART/SPI
I/O Block
CLK1
CLK2
SERVICE
RESET
Two Timer/Counters
Oscillator,
Clock, and
Control
External Address and
Data Bus (CY7C53150L)
Flash
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