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參數資料
| 型號： | CY7C960-ASC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | Low Cost VMEbus Interface Controller Family |
| 中文描述： | VME BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, TQFP-64 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 250K |
| 代理商： | CY7C960-ASC |
Low Cost VMEbus Interface
Controller Family
fax id: 5603
CY7C960
CY7C961
Cypress Semiconductor Corporation
3901 North First Street
San Jose
December 1994 – Revised December 4, 1997
CA 95134
408-943-2600
Features
80-Mbyte-per-second block transfer rates
All VME64 transactions provided, including A64/D64,
A40/MD32 transfers
Auto Slot ID
CR/CSR space
All standard (Rev C) VMEbus transactions implemented
VMEbus Interrupter
No local CPU required
Programmable from VMEbus, serial PROM, or local bus
DRAM controller, including refresh
On-chip DMA controller
Local I/O controller
Flexible VMEbus address scheme
User-configured VMEbus response
64-pin TQFP, 10x10mm (CY7C960)
100-pin TQFP, 14x14mm (CY7C961)
Functional Description
The CY7C960 Slave VMEbus Interface Controller provides the
board designer with an integrated, full-featured VME64 inter-
face. This 64-pin device can be programmed to handle every
transaction defined in the VME64 specification. The CY7C961
is based upon the CY7C960: additional features include Re-
mote Master capability whereby the CY7C961 can be com-
manded to move data as a VMEbus master. The CY7C961 is
packaged in a 100-pin outline.
The CY7C960 contains all the circuitry needed to control large
DRAM arrays and local I/O circuitry without the intervention of
a local CPU. There are no registers to read or write, no com-
plex command blocks to be constructed in memory. The
CY7C960 simply fetches its own configuration parameters
during the power-on reset period. After reset the CY7C960
responds appropriately to VMEbus activity and controls local
circuitry transparently.
VMECONTROL
INTERFACE
CY7C960 Logic Block Diagram
c960–1
REGION/
AM TABLE
CY7C964CONTROLLER
POWER-ON
RESET
GENERATOR
AM [5:0]
SYSRESET*
AS*
DS0*
DS1*
DTACK*
WRITE*
CLK
REGION[3:0]
IRQ*
IACK*
IACKIN*
IACKOUT*
LOCAL ADDRESS
CONTROLLER
CHIP SELECT
OUTPUT PATTERN
TABLE
DATA BYTE
ENABLE
CONTROLLER
DATABYTE
LANE
DECODER
LOCAL
CONTROL
CIRCUIT
DRAM
CONTROLLER
REFRESH
CONTROLLER
TIMING
GENERATOR
VME INTERRUPT
INTERFACE
CS[5:0]
DBE[3:0]
LACK*
LDEN*
PREN*
SWDEN*
R/W
R
C
R
C
L
D
S
D
D
D
L
L
L
L
A
L
LA [7:1]
LWORD
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C960-UM | Low Cost VMEbus Interface Controller Family |
| CY7C960-UMB | Low Cost VMEbus Interface Controller Family |
| CY7C961 | Low Cost VMEbus Interface Controller Family |
| CY7C961-NC | Low Cost VMEbus Interface Controller Family |
| CY7C964 | Bus Interface Logic Circuit |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C960-UMB | 制造商:Cypress Semiconductor 功能描述: |
| CY7C9611-NC | 功能描述:IC PHYSICAL LAYER DEVICE RoHS:否 類別:未定義的類別 >> 其它 系列:* 標準包裝:1 系列:* 其它名稱:MS305720A |
| CY7C964A-GMB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C964AUM | 制造商: 功能描述: 制造商:CY 功能描述: 制造商:undefined 功能描述: |
| CY7C964-NC | 制造商:Cypress Semiconductor 功能描述: |
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