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參數資料
| 型號： | CYS25G0101DX |
| 英文描述： | Physical Layer Devices |
| 中文描述： | 物理層設備 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 212K |
| 代理商： | CYS25G0101DX |
SONET OC-48 Transceiver
CYS25G0101DX
Cypress Semiconductor Corporation
Document #: 38-02009 Rev. *J
3901 North First Street
San Jose
CA 95134
Revised December 30, 2002
408-943-2600
Features
SONET OC-48 operation
Bellcore and ITU jitter compliance
2.488-GBaud serial signaling rate
Multiple selectable loopback/loop-through modes
Single 155.52-MHz reference clock
Transmit FIFO for flexible data interface clocking
16-bit parallel-to-serial conversion in transmit path
Serial-to-16-bit parallel conversion in receive path
Synchronous parallel interface
—LVPECL-compliant
—HSTL-compliant
Internal transmit and receive phase-locked loops
(PLLs)
Differential CML serial input
—50-mV input sensitivity
—100
Internal termination and DC-restoration
Differential CML serial output
—
Source matched for 50
transmission lines (100
differential transmission lines)
Direct interface to standard fiber-optic modules
Less than 1.0W typical power
120-pin 14 mm
×
14 mm TQFP
Standby power-saving mode for inactive loops
0.25
μ
BiCMOS technology
Functional Description
The CYS25G0101DX SONET OC-48 Transceiver is a
communications building block for high-speed SONET data
communications. It provides complete parallel-to-serial and
serial-to-parallel conversion, clock generation, and clock and
data recovery operations in a single chip, optimized for full
SONET compliance.
Transmit Path
New data is accepted at the 16-bit parallel transmit interface
at a rate of 155.52 MHz. This data is passed to a small
integrated FIFO to allow flexible transfer of data between the
SONET processor and the transmit serializer. As each 16-bit
word is read from the transmit FIFO, it is serialized and sent
out the high-speed differential line driver at a rate of 2.488
Gbits/second.
Receive Path
As serial data is received at the differential line receiver, it is
passed to a clock and data recovery (CDR) PLL, which
extracts a precision low-jitter clock from the transitions in the
data stream. This bit-rate clock is then used to sample the data
stream and receive the data. Every 16-bit-times, a new word
is presented at the receive parallel interface along with a clock.
Parallel Interface
The parallel I/O interface supports high-speed bus communi-
cations using HSTL signaling levels to minimize both power
consumption and board landscape. The HSTL outputs are
capable of driving unterminated transmission lines of less than
70 mm, and terminated 50
transmission lines of more than
twice that length.
The CYS25G0101DX Transceiver
’
s parallel HSTL I/O can
also be configured to operate at LVPECL signaling levels. This
can all be done externally by changing V
DDQ
, V
REF
, and
creating a simple circuit at the termination of the transceiver
’
s
parallel output interface.
Clocking
The source clock for the transmit data path is selectable from
either the recovered clock or an external BITS (Building
Integrated Timing Source) reference clock. The low jitter of the
Figure 1. CYS25G0101DX System Connections
SONET Data
Processor
Serial Data
Optical
XCVR
RD+
RD
–
SD
TD
–
TD+
IN+
IN
–
SD
OUT
–
OUT+
Serial Data
CYS25G0101DX
TXD[15:0]
TXCLKI
FIFO_RST
BITS Time
Reference
155.52 MHz
REFCLK
±
FIFO_ERR
TXCLKO
RXD[15:0]
RXCLK
2
LOOPTIME
DIAGLOOP
LOOPA
LINELOOP
RESET
PWRDN
LOCKREF
LFI
16
16
Transmit Data
Interface
Receive Data
Interface
Data & Clock
Direction
Control
Status and
System
Control
Host Bus
Interface
S
Optical
Fiber Links
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PDF描述 |
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| CYS25G01K100 | Physical Layer Devices |
| CYW2315X | |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CYS25G0101DX_07 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:SONET OC-48 Transceiver |
| CYS25G0101DX_10 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:SONET OC-48 Transceiver |
| CYS25G0101DX-AEXC | 功能描述:電信線路管理 IC SONET OC-48 Transceiver RoHS:否 制造商:STMicroelectronics 產品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYS25G0101DX-ATC | 制造商:Cypress Semiconductor 功能描述:SONET Transceiver 1TX 1RX 2.488GBd 120-Pin TQFP |
| CYS25G0101DX-ATI | 制造商:Cypress Semiconductor 功能描述: |
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