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參數(shù)資料
型號(hào): CYV15G0101DXB-BBI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Single-channel HOTLink Transceiver
中文描述: SPECIALTY TELECOM CIRCUIT, PBGA100
封裝: 11 X 11 MM, 1.40 MM HEIGHT, BGA-100
文件頁數(shù): 1/39頁
文件大?。?/td> 457K
代理商: CYV15G0101DXB-BBI
Single-channel HOTLink II Transceiver
CYP15G0101DXB
CYV15G0101DXB
Cypress Semiconductor Corporation
Document #: 38-02031 Rev. *I
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised March 16, 2004
Features
Single-channel transceiver for 195 to 1500 MBaud serial
signaling rate
Second-generation HOTLink
technology
Compliant to multiple standards
—ESCON, DVB-ASI, Fibre Channel and Gigabit
Ethernet (IEEE802.3z)
—CYV15G0101DXB also compliant to SMPTE 259M
and SMPTE 292M
—8B/10B encoded or 10-bit unencoded data
Selectable parity check/generate
Selectable input clocking options
Selectable output clocking options
MultiFrame Receive Framer
—Bit and Byte alignment
—Comma or full K28.5 detect
—Single- or Multi-Byte framer for byte alignment
—Low-latency option
Synchronous LVTTL parallel input and parallel output
interface
Internal phase-locked loops (PLLs) with no external
PLL components
Dual differential PECL-compatible serial inputs
—Internal DC-restoration
Dual differential PECL-compatible serial outputs
Source matched for driving 50 transmission lines
—No external bias resistors required
—Signaling-rate controlled edge-rates
Optional Elasticity Buffer in Receive Path
Optional Phase Align Buffer in Transmit Path
Compatible with
—fiber-optic modules
—copper cables
—circuit board traces
JTAG boundary scan
Built-In Self-Test (BIST) for at-speed link testing
Per-channel Link Quality Indicator
—Analog signal detect
—Digital signal detect
Low power 1.25W @ 3.3V typical
Single 3.3V supply
100-ball BGA
0.25 BiCMOS technology
Functional Description
The CYP(V)15G0101DXB
[1]
single-channel HOTLink II
transceiver is a point-to-point communications building block
allowing the transfer of data over a high-speed serial link
(optical fiber, balanced, and unbalanced copper transmission
lines) at signaling speeds ranging from 195 to 1500 MBaud.
The transmit channel accepts parallel characters in an Input
Register, encodes each character for transport, and converts
it to serial data. The receive channel accepts serial data and
converts it to parallel data, frames the data to character bound-
aries, decodes the framed characters into data and special
characters, and presents these characters to an Output
Register.
Figure 1
illustrates typical connections between
independent
host
systems
CYP(V)15G0101DXB parts. As a second-generation HOTLink
device, the CYP(V)15G0101DXB extends the HOTLink II
family with enhanced levels of integration and faster data
rates, while maintaining serial-link compatibility (data,
command, and BIST) with other HOTLink devices.
and
corresponding
Note:
1.
CYV15G0101DXB refers to SMPTE 259M and SMPTE 292M compliant devices.
CYP15G0101DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements.
CYP(V)15G0101DXB refers to both devices.
10
10
10
10
Serial Link
C
S
S
Backplane or Cabled
Connections
Figure 1. HOTLink II System Connections
C
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CYV15G0101DX-VIDEO 功能描述:時(shí)鐘緩沖器 Sngl-Ch HOTLink II Transceiver RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
CYV15G0101EQ 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Multi-Rate Video Cable Equalizer (SOIC)
CYV15G0101EQ_07 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Multi Rate Video Cable Equalizer
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