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參數(shù)資料
型號(hào): DAC8248GPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/16頁(yè)
文件大小: 0K
描述: IC DAC 12BIT DUAL W/BUFF 24DIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 15
設(shè)置時(shí)間: 1µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 50µW
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 通孔
封裝/外殼: 24-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 24-PDIP
包裝: 管件
輸出數(shù)目和類(lèi)型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 1M
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Dual 12-Bit (8-Bit Byte)
Double-Buffered CMOS D/A Converter
DAC8248
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
FEATURES
Two Matched 12-Bit DACs on One Chip
12-Bit Resolution with an 8-Bit Data Bus
Direct Interface with 8-Bit Microprocessors
Double-Buffered Digital Inputs
RESET to Zero Pin
12-Bit Endpoint Linearity ( 1/2 LSB) Over Temperature
5 V to
15 V Single Supply Operation
Latch-Up Resistant
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Pin DIP and 0.3" 24-Pin
SOL Package
Available in Die Form
APPLICATIONS
Multichannel Microprocessor-Controlled Systems
Robotics/Process Control/Automation
Automatic Test Equipment
Programmable Attenuator, Power Supplies, Window
Comparators
Instrumentation Equipment
Battery Operated Equipment
GENERAL DESCRIPTION
The DAC8248 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has an 8-bit wide input data port that inter-
faces directly with 8-bit microprocessors. It loads a 12-bit word in
two bytes using a single control; it can accept either a least signifi-
cant byte or most significant byte first. For designs with a 12-bit or
16-bit wide data path, choose the DAC8222 or DAC8221.
The DAC8248’s double-buffered digital inputs allow both
DAC’s analog output to be updated simultaneously. This is par-
ticularly useful in multiple DAC systems where a common
LDAC
signal updates all DACs at the same time. A single
RESET
pin resets both outputs to zero.
The DAC8248’s monolithic construction offers excellent DAC-
to-DAC matching and tracking over the full operating tempera-
ture range. The DAC consists of two thin-film R-2R resistor
ladder networks, two 12-bit, two 8-bit, and two 4-bit data regis-
ters, and control logic circuitry. Separate reference input and
feedback resistors are provided for each DAC. The DAC8248
(continued on page 4)
FUNCTIONAL BLOCK DIAGRAM
PIN CONNECTIONS
24-Pin 0.3" Cerdip (W Suffix),
24-Pin Epoxy DIP (P Suffix),
24-Pin SOL (S Suffix)
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