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參數(shù)資料
| 型號： | DC1278A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC2351-14 |
| 軟件下載： | QuikEval II System |
| 設計資源： | DC1278A Design File DC1278A Schematic |
| 標準包裝： | 1 |
| 系列： | QuikEval-II™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 1.5M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 輸入范圍： | 0 ~ 2.5 V |
| 在以下條件下的電源（標準）： | 16.5mW @ 1.5MSPS |
| 已用 IC / 零件： | LTC2351-14 |
| 已供物品： | 板 |
| 相關產(chǎn)品： | LTC2351HUH-14#PBF-ND - IC ADC 14BIT 1.5MSPS 32-QFN LTC2351HUH-12#PBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN LTC2351HUH-14#TRPBF-ND - IC ADC 14BIT 1.5MSPS 32-QFN LTC2351HUH-12#TRPBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN LTC2351CUH-12#TRPBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN LTC2351IUH-14#TRPBF-ND - IC ADC 14BIT 1.5MSPS 32-QFN LTC2351IUH-12#TRPBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN LTC2351CUH-14#TRPBF-ND - IC ADC 14BIT 1.5MSPS 32-QFN LTC2351CUH-12#PBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN LTC2351IUH-12#PBF-ND - IC ADC 12BIT 1.5MSPS 32-QFN 更多... |
LTC2351-14
1
235114fb
FEATURES
APPLICATIONS
DESCRIPTION
6-Channel, 14-Bit, 1.5Msps
Simultaneous Sampling ADC
with Shutdown
The LTC2351-14 is a 14-bit, 1.5Msps ADC with six simul-
taneously sampled differential inputs. The device draws
only 5.5mA from a single 3V supply, and comes in a tiny
32-pin (5mm
× 5mm) QFN package. A sleep shutdown
mode further reduces power consumption to 12μW. The
combination of low power and tiny package makes the
LTC2351-14 suitable for portable applications.
The LTC2351-14 contains six separate differential inputs
that are sampled simultaneously on the rising edge of the
CONV signal. These six sampled inputs are then converted
at a rate of 250ksps per channel.
The 83dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The device converts 0V to 2.5V unipolar inputs differentially,
or ±1.25V bipolar inputs also differentially, depending on the
state of the BIP pin. Any analog input may swing rail-to-rail
as long as the differential input range is maintained.
The conversion sequence can be abbreviated to convert
fewer than six channels, depending on the logic state of
the SEL2, SEL1 and SEL0 inputs.
Theserialinterfacesendsoutthesixconversionresultsin96
clocks for compatibility with standard serial interfaces.
n 1.5Msps ADC with Six Simultaneously Sampled
Differential Inputs
n 250ksps Throughput per Channel
n 75dB SINAD
n Low Power Dissipation: 16.5mW
n 3V Single Supply Operation
n 2.5V Internal Bandgap Reference, Can Be Overdriven
with External Reference
n 3-Wire SPI-Compatible Serial Interface
n Internal Conversion Triggered by CONV
n Sleep (12μW) Shutdown Mode
n NAP (4.5mW) Shutdown Mode
n 0V to 2.5V Unipolar, or ±1.25V Bipolar Differential
Input Range
n 83dB Common Mode Rejection
n Tiny 32-Pin (5mm
× 5mm) QFN Package
n Multiphase Power Measurement
n Multiphase Motor Control
n Data Acquisition Systems
n Uninterruptable Power Supplies
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 6084440, 6522187.
BLOCK DIAGRAM
–
+
4
5
25
24
–
+
7
6
9
12
13
16
19
8
CH0–
CH0+
CH1–
CH1+
10
11
–
+
14
15
CH2–
CH2+
CH3–
CH3+
–
+
17
18
–
+
20
21
S AND H
CH4–
CH4+
CH5–
CH5+
MUX
VREF
10μF
BIP
SEL2 SEL1 SEL0
GND
2.5V
REFERENCE
1.5Msps
14-BIT ADC
14-BIT LATCH 5
14-BIT LATCH 4
14-BIT LATCH 3
14-BIT LATCH 2
14-BIT LATCH 1
14-BIT LATCH 0
10μF
3V
VCC
VDD
26
29
23
22
33
27
28
2
1
SD0
0.1μF
3
OVDD
3V
32
SCK
31
DGND
OGND
30
CONV
THREE-
STATE
SERIAL
OUTPUT
PORT
TIMING
LOGIC
235114 TA01
–
+
S AND H
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