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參數(shù)資料
型號(hào)： DC1369A-C
廠商： Linear Technology
文件頁(yè)數(shù)： 16/34頁(yè)
文件大?。?/td> 0K
描述： BOARD DEMO 80MSPS LTC2259-14
軟件下載： QuikEval II System
設(shè)計(jì)資源： DC1369A Design Files
標(biāo)準(zhǔn)包裝： 1
系列： *
相關(guān)產(chǎn)品： DC890B-ND - BOARD USB DATA COLLECTION
23
226114fc
LTC2261-14
LTC2260-14/LTC2259-14
For more information www.linear.com/LTC2261-14
Phase Shifting the Output Clock
In full-rate CMOS mode the data output bits normally
change at the same time as the falling edge of CLKOUT+,
so the rising edge of CLKOUT+ can be used to latch the
output data. In double-data rate CMOS and LVDS modes
the data output bits normally change at the same time as
the falling and rising edges of CLKOUT+. To allow adequate
setup-and-hold time when latching the data, the CLKOUT+
signal may need to be phase shifted relative to the data
output bits. Most FPGAs have this feature; this is generally
the best place to adjust the timing.
TheLTC2261-14/LTC2260-14/LTC2259-14canalsophase
shift the CLKOUT+/CLKOUT– signals by serially program-
ming mode control register A2. The output clock can be
shifted by 0°, 45°, 90° or 135°. To use the phase shifting
feature the clock duty cycle stabilizer must be turned
on. Another control register bit can invert the polarity of
CLKOUT+ and CLKOUT–, independently of the phase shift.
Thecombinationofthesetwofeaturesenablesphaseshifts
of 45° up to 315° (Figure 14).
DATA FORMAT
Table 1 shows the relationship between the analog input
voltage, the digital data output bits and the overflow bit.
By default the output data format is offset binary. The 2’s
complement format can be selected by serially program-
ming mode control register A4.
Table 1. Output Codes vs Input Voltage
AIN+ – AIN–
(2V Range)
OF
D13-D0
(OFFSET BINARY)
D13-D0
(2’s COMPLEMENT)
>1.000000V
+0.999878V
+0.999756V
1
0
11 1111 1111 1111
11 1111 1111 1110
01 1111 1111 1111
01 1111 1111 1110
+0.000122V
+0.000000V
–0.000122V
–0.000244V
0
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
–0.999878V
–1.000000V
≤–1.000000V
0
1
00 0000 0000 0001
00 0000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
applicaTions inForMaTion
CLKOUT+
D0-D13, OF
PHASE
SHIFT
0°
45°
90°
135°
180°
225°
270°
315°
CLKINV
0
1
CLKPHASE1
MODE CONTROL BITS
0
1
0
1
CLKPHASE0
0
1
0
1
0
1
0
1
226114 F14
ENC+
Figure 14. Phase Shifting CLKOUT
相關(guān)PDF資料
PDF描述
5AB LAMP NEON WIRE TERMINAL NE-23
DC1369A-H BOARD DEMO 105MSPS LTC2260-12
CM381 LAMP T1-3/4 FLANGE BASE .2A
A0213Y 30MM IND CTRL PB OPERATOR
CM380 LAMP T1-3/4 FLANGE BASE .04A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DC1369A-D 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075; Silicon Manufacturer:Linear Technology; Silicon Core Number:LTC2258-14; Kit Application Type:Data Converter; Application Sub Type:ADC; Kit Contents:Board, Guide
DC1369A-E 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075; Silicon Manufacturer:Linear Technology; Silicon Core Number:LTC2257-14; Kit Application Type:Data Converter; Application Sub Type:ADC; Kit Contents:Board, Guide
DC1369A-F 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075 制造商:Linear Technology 功能描述:14BIT ADC Eval Brd, Rq. DC1371 & DC1075; Silicon Manufacturer:Linear Technology; Silicon Core Number:LTC2256-14; Kit Application Type:Data Converter; Application Sub Type:ADC; Kit Contents:Board, Guide
DC1369A-G 功能描述:BOARD DEMO 125MSPS LTC2261-12 RoHS:是 類別:未定義的類別 >> 其它 系列:* 標(biāo)準(zhǔn)包裝:1 系列:* 其它名稱:MS305720A
DC1369A-H 功能描述:BOARD DEMO 105MSPS LTC2260-12 RoHS:是 類別:未定義的類別 >> 其它 系列:* 標(biāo)準(zhǔn)包裝:1 系列:* 其它名稱:MS305720A
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