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參數資料
| 型號： | DCX114EH-7 |
| 廠商： | DIODES INC |
| 元件分類： | 功率晶體管 |
| 英文描述： | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| 中文描述： | 50 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR |
| 封裝： | GREEN, PLASTIC PACKAGE-6 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 98K |
| 代理商： | DCX114EH-7 |
Pb
Lead-free
DS30422 Rev. 2 - 2
1 of 6
DCX (xxxx) H
www.diodes.com
Diodes Incorporated
Epitaxial Planar Die Construction
Built-In Biasing Resistors
Lead Free By Design/RoHS Compliant (Note 2)
Characteristic
Symbol
V
CC
Value
50
-10 to +40
-10 to +40
-10 to +30
-6 to +40
-5 to +12
-10 to +40
-5 Vmax
-5 Vmax
30
30
100
70
100
50
100
100
100
150
833
-55 to +150
Unit
V
Supply Voltage
Input Voltage
DCX124EH
DCX144EH
DCX143EH
DCX114YH
DCX123JH
DCX114EH
DCX143TH
DCX114TH
V
IN
V
Output Current DCX124EH
DCX144EH
DCX143EH
DCX114YH
DCX123JH
DCX114EH
DCX143TH
DCX114TH
I
O
mA
Output Current
Power Dissipation (Total)
Thermal Resistance, Junction to Ambient Air (Note 1)
Operating and Storage and Temperature Range
All
I
C
(Max)
P
d
R
JA
T
j
, T
STG
mA
mW
C/W
C
Features
Maximum Ratings NPN Section
@ T
A
= 25 C unless otherwise specified
A
M
L
B C
H
K
G
D
CXXYM
Mechanical Data
Case: SOT-563
Case Material: Molded Plastic. UL Flammability
Classification Rating 94V-0
Moisture sensitivity: Level 1 per J-STD-020C
Terminals: Finish - Matte Tin annealed over Alloy 42
leadframe. Solderable per MIL-STD-202, Method 208
Terminal Connections: See Diagram
Weight: 0.005 grams (approx.)
T
C
U
D
O
R
P
W
E
N
P/N
R1
22K
47K
4.7K
10K
2.2K
10K
4.7K
10K
R2
22K
47K
4.7K
47K
47K
10K
MARKING
C17
C20
C08
C14
C06
C13
C07
C12
DCX124EH
DCX144EH
DCX143EH
DCX114YH
DCX123JH
DCX114EH
DCX143TH
DCX114TH
-
-
R
1
R
1
R
2
R
2
R
1
R
1
R
1
, R
2
R
1
Only
DCX (xxxx) H
COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL
SOT-563 DUAL SURFACE MOUNT TRANSISTOR
SOT-563
Min
Dim
A
B
C
D
G
H
K
L
M
Max
Typ
0.15
0.30
0.25
1.10
1.25
1.20
1.55
1.70
1.60
0.50
0.90
1.10
1.00
1.50
1.70
1.60
0.56
0.60
0.60
0.15
0.25
0.20
0.10
0.18
0.11
All Dimensions in mm
Notes:
1. Mounted on FR4 Board with recommended pad layout at http://www.diodes.com/datasheets/ap02001.pdf.
2. No purposefully added lead.
SCHEMATIC DIAGRAM, TOP VIEW
相關PDF資料 |
PDF描述 |
|---|---|
| DCX114TH-7 | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DCX114YH-7 | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DCX123JH-7 | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DCX124EH-7 | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
| DCX143TH-7 | COMPLEMENTARY NPN/PNP PRE-BIASED SMALL SIGNAL SOT-563 DUAL SURFACE MOUNT TRANSISTOR |
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