- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376620 > DDU4F-5075MC2 Delay Line PDF資料下載
參數(shù)資料
| 型號(hào)： | DDU4F-5075MC2 |
| 英文描述： | Delay Line |
| 中文描述： | 延遲線 |
| 文件頁(yè)數(shù)： | 4/4頁(yè) |
| 文件大小： | 82K |
| 代理商： | DDU4F-5075MC2 |
DDU4F
Doc #97033
DATA DELAY DEVICES, INC.
4
Powered by ICminer.com Electronic-Library Service CopyRight 2003
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
o
C
±
3
o
C
Supply Voltage (Vcc):
Input Pulse:
OUTPUT:
Load:
C
load
:
Threshold:
1 FAST-TTL Gate
5pf
±
10%
1.5V (Rising & Falling)
5.0V
±
0.1V
High = 3.0V
±
0.1V
Low = 0.0V
±
0.1V
50
Max.
3.0 ns Max. (measured
between 0.6V and 2.4V )
PW
IN
= 1.5 x Total Delay
PER
IN
= 10 x Total Delay
Source Impedance:
Rise/Fall Time:
Pulse Width:
Period:
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
T1
OUT
TRIG
IN
REF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
TIME INTERVAL
COUNTER
PULSE
GENERATOR
COMPUTER
SYSTEM
PRINTER
IN
T2
T3
T4
T5
Timing Diagram For Testing
T
RISE
T
FALL
PER
IN
PW
IN
T
RISE
T
FALL
0.6V
0.6V
2.4V
1.5V
1.5V
1.5V
V
IH
V
IL
V
OH
V
OL
INPUT
SIGNAL
OUTPUT
SIGNAL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DDU4F-5100 | Tapped Delay Line |
| DDU4F-5100A2 | Delay Line |
| DDU4F-5100B2 | Delay Line |
| DDU4F-5100M | Delay Line |
| DDU4F-5100MC2 | Delay Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDU4F-5100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line |
| DDU4F-5100A2 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
| DDU4F-5100B2 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
| DDU4F-5100M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
| DDU4F-5100MC | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。