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參數(shù)資料
| 型號： | DG405 |
| 廠商： | Intersil Corporation |
| 英文描述： | Monolithic CMOS Analog Switches |
| 中文描述： | 改進的雙路、高速模擬開關(guān) |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 93K |
| 代理商： | DG405 |
6
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Application Information
Dual Slope Integrators
The DG403 is well suited to configure a selectable slope
integrator. One control signal selects the timing capacitor C
1
or C
2
. Another one selects e
IN
or discharges the capacitor in
preparation for the next integration cycle.
Peak Detector
A
3
acting as a comparator provides the logic drive for
operating SW
1
. The output of A
2
is fed back to A
3
and
compared to the analog input e
IN
. If e
IN
> e
OUT
the output
of A
3
is high keeping SW
1
closed. This allows C
1
to charge
up to the analog input voltage. When e
IN
goes below e
OUT
,
A
3
goes negative, turning SW
1
off. The system will therefore
store the most positive analog input experienced.
V-
GND
-15V
IN
2
IN
1
S
3
S
1
S
2
S
4
D
1
D
2
D
3
D
4
+15V
+5V
V
L
V+
DG403
C
1
C
2
e
OUT
e
IN
INTEGRATE/
RESET
SCOPE
SELECT
TTL
FIGURE 8. DUAL SLOPE INTEGRATOR
e
OUT
e
IN
C
1
R
1
SW
2
SW
1
RESET
+
+
+
DG401
A
1
A
3
FIGURE 9. POSITIVE PEAK DETECTOR
A
2
Typical Performance Curves
FIGURE 10. INPUT SWITCHING THRESHOLD vs LOGIC
SUPPLY VOLTAGE
FIGURE 11. INPUT SWITCHING THRESHOLD vs
POWER SUPPLY VOLTAGE
V
T
V
L
(V)
10
8
6
4
2
0
0
2
4
6
8
10
12
14
16
18
20
V+ = 15V
V- = -15V
T
A
= 20
o
C
DG403
SW3, 4
V
T
SUPPLY VOLTAGE (
±
V)
4
3
2
1
0
0
2
4
6
8
10
12
14
16
18
20
V
L
= 5V
T
A
= 25
o
C
DG401, DG403, DG405
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DG404DJ | DPST Analog Switch |
| DG400AK | SPST Analog Switch |
| DG400DJ | SPST Analog Switch |
| DG402AK | SPDT Analog Switch |
| DG402DJ | SPDT Analog Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DG405 WAF | 制造商:Intersil Corporation 功能描述: |
| DG405/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Monolithic CMOS Analog Switches |
| DG4051A | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:8-Channel, Dual 4-Channel, Triple 2-Channel Multiplexers, with 0.5 pC Charge Injection |
| DG4051A_10 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:8-Channel, Dual 4-Channel, Triple 2-Channel (Triple SPDT) Multiplexers |
| DG4051AEN-T1-E4 | 功能描述:多路器開關(guān) IC LV Single 8:1 Multiplexer/MUX RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16 |
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