參數資料
| 型號： | DG884DN-E3 |
| 廠商： | Vishay Siliconix |
| 文件頁數： | 1/14頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO MULTIPLEXER 8X4 |
| 標準包裝： | 300 |
| 功能： | 視頻交叉點開關 |
| 電路： | 1 x 8:4 |
| 導通狀態電阻： | 90 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 18 V，±10 V ~ 15 V |
| 電流 - 電源： | 1.5mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應商設備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
Vishay Siliconix
DG884
Document Number: 70071
S-71241–Rev. H, 25-Jun-07
www.vishay.com
1
8 x 4 Wideband Video Crosspoint Array
FEATURES
Routes Any Input to Any Output
Wide Bandwidth: 300 MHz
Low Crosstalk: - 85 dB at 5 MHz
Double Buffered TTL-Compatible
Latches with Readback
Low rDS(on): 45 Ω
Optional Negative Supply
BENEFITS
Reduced Board Space
Improved System Bandwidth
Improved Channel Off-Isolation
Simplified Logic Interfacing
Allows Bipolar Signal Swings
Reduced Insertion Loss
High Reliability
APPLICATIONS
Wideband Signal Routing and Multiplexing
High-End Video Systems
NTSC, PAL, SECAM Switchers
Digital Video Routing
ATE Systems
DESCRIPTION
The DG884 contains a matrix of 32 T-switches configured in
an 8 x 4 crosspoint array. Any of the IN/OUT pins may be
used as an input or output. Any of the IN pins may be
switched to any or simultaneously to all OUT pins.
The DG884 is built on a proprietary D/CMOS process that
combines low capacitance switching DMOS FETs with low
power CMOS control logic and drivers. The ground lines
between adjacent signal input pins help to reduce crosstalk.
The low on-resistance and low on-capacitance of the DG884
make it ideal for video and wideband signal routing.
Control data is loaded individually into four Next Event
latches.
When
all
Next
Event
latches
have
been
programmed, data is transferred into the Current Event
latches via a SALVO command. Current Event latch data
readback is available to poll array status.
Output disable capabilities make it possible to parallel
multiple DG884s to form larger switch arrays. DIS outputs
provide control signals used to place external buffers in a
power saving mode.
For additional information see applications note AN504
(FaxBack document number 70610).
FUNCTIONAL BLOCK DIAGRAM
* Pb containing terminations are not RoHS compliant, exemptions may apply
IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8
OUT1
OUT2
OUT3
OUT4
A3 A2 A1 A0
B0
B1
CS
WR
I/O
I/O Control
Logic
Decode Logic, Switch Drivers
Current Event Latches
Next Event Latches
8 4 Switch Matrix
4 Disable Outputs
RS
SALVO
Available
Pb-free
RoHS*
COMPLIANT
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