- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376726 > DJIXP972MBCA4 (Intel Corp.) Single-Port 10/100 Mbps PHY Transceiver PDF資料下載
參數(shù)資料
| 型號： | DJIXP972MBCA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發(fā)器 |
| 文件頁數(shù)： | 75/92頁 |
| 文件大小： | 666K |
| 代理商： | DJIXP972MBCA4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁當前第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
75
8.0
Register Definitions - IEEE Base Registers
This chapter includes definitions for the IEEE base registers used by the LXT972M Transceiver.
Chapter 9.0, “Register Definitions - Product-Specific Registers”
includes definitions of additional
product-specific LXT972M Transceiver registers, which are defined in accordance with the IEEE
802.3 standard for adding unique device functions.
The LXT972M Transceiver register set has multiple 16-bit registers.
Table 40
is a register set listing of the IEEE base registers.
Table 41
through
Table 49
provide bit descriptions of the base registers (address 0 through 8),
which are defined in accordance with the “Reconciliation Sublayer and Media Independent
Interface” and “Physical Layer Link Signaling for 10/100 Mbps Auto-Negotiation” sections of
the IEEE 802.3 standard.
Table 40. Register Set for IEEE Base Registers
Address
Register Name
Bit Assignments
0
Control Register
See
Table 41
1
Status Register #1
See
Table 42.
2
PHY Identification Register 1
See
Table 43.
3
PHY Identification Register 2
See
Table 44.
4
Auto-Negotiation Advertisement Register
See
Table 45
5
Auto-Negotiation Link Partner Base Page Ability Register
See
Table 46.
6
Auto-Negotiation Expansion Register
See
Table 47.
7
Auto-Negotiation Next Page Transmit Register
See
Table 48.
8
Auto-Negotiation Link Partner Next Page Receive Register
See
Table 49.
9
1000BASE-T/100BASE-T2 Control Register
Not Implemented
10
1000BASE-T/100BASE-T2 Status Register
Not Implemented
11 to 14
Reserved
Not Implemented
15
Extended Status Register
Not Implemented
相關PDF資料 |
PDF描述 |
|---|---|
| DJIXP972MBEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MEAA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DJIXP972MBEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MCEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJIXP972MEAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
發(fā)布緊急采購，3分鐘左右您將得到回復。