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參數(shù)資料
型號: DJIXP972MKEA4
廠商: Intel Corp.
英文描述: Single-Port 10/100 Mbps PHY Transceiver
中文描述: 單端口10/100 Mbps的物理層收發(fā)器
文件頁數(shù): 47/92頁
文件大小: 666K
代理商: DJIXP972MKEA4
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
47
CONTROL
0 1 0 1
J
2
1 1 0 0 0
Start-of-Stream Delimiter (SSD),
part 1 of 2
0 1 0 1
K
2
1 0 0 0 1
Start-of-Stream Delimiter (SSD),
part 2 of 2
Undefined
T
3
0 1 1 0 1
End-of-Stream Delimiter (ESD),
part 1 of 2
Undefined
R
3
0 0 1 1 1
End-of-Stream Delimiter (ESD),
part 2 of 2
INVALID
Undefined
H
4
0 0 1 0 0
Transmit Error. Used to force signaling
errors
Undefined
Invalid
0 0 0 0 0
Invalid
Undefined
Invalid
0 0 0 0 1
Invalid
Undefined
Invalid
0 0 0 1 0
Invalid
Undefined
Invalid
0 0 0 1 1
Invalid
Undefined
Invalid
0 0 1 0 1
Invalid
Undefined
Invalid
0 0 1 1 0
Invalid
Undefined
Invalid
0 1 0 0 0
Invalid
Undefined
Invalid
0 1 1 0 0
Invalid
Undefined
Invalid
1 0 0 0 0
Invalid
Undefined
Invalid
1 1 0 0 1
Invalid
Table 15. 4B/5B Coding (Sheet 2 of 2)
Code Type
4B Code
3 2 1 0
Name
5B Code
4 3 2 1 0
Interpretation
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs, and /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs, and /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
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DJLXT972MKCA4 Single-Port 10/100 Mbps PHY Transceiver
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DJIXP972MLAA4 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver
DJIXP972MLCA4 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver
DJIXP972MLEA4 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver
DJIXP972MNAA4 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver
DJIXP972MNCA4 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver
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