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參數(shù)資料
| 型號(hào)： | DM74ALS245 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Octal 3-STATE Bus Transceiver |
| 中文描述： | 八路三態(tài)總線收發(fā)器 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 73K |
| 代理商： | DM74ALS245 |
2000 Fairchild Semiconductor Corporation
DS006213
www.fairchildsemi.com
September 1986
Revised February 2000
D
DM74ALS245A
Octal 3-STATE Bus Transceiver
General Description
This advanced low power Schottky device contains 8 pairs
of 3-STATE logic elements configured as octal bus trans-
ceivers. These circuits are designed for use in memory,
microprocessor systems and in asynchronous bidirectional
data buses. Two way communication between buses is
controlled by the (DIR) input. Data transmits either from the
A bus to the B bus or from the B bus to the A bus. Both the
driver and receiver outputs can be disabled via the (G)
enable input which causes outputs to enter the high imped-
ance mode so that the buses are effectively isolated.
Features
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
Non-inverting logic output
I
Glitch free bus during power up and down
I
3-STATE outputs independently controlled on A and B
buses
I
Low output impedance to drive terminated transmission
lines to 133
I
Switching response specified into 500
/50 pF
I
Specified to interface with CMOS at V
OH
=
V
CC
2V
I
PNP inputs to reduce input loading
I
Switching specifications guaranteed over full tempera-
ture and V
CC
range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Either HIGH or LOW Logic Level
Order Number
DM74ALS245AWM
DM74ALS245ASJ
DM74ALS245AMSA
DM74ALS245AN
Package Number
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Control
Inputs
Operation
G
L
L
H
DIR
L
H
X
B Data to A Bus
A Data to B Bus
Hi-Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74ALS245AWM | Octal 3-STATE Bus Transceiver |
| DM74ALS245AMSA | Octal 3-STATE Bus Transceiver |
| DM74ALS245AMSAX | Single 8-bit Bus Transceiver |
| DM74ALS245ASJX | Single 8-bit Bus Transceiver |
| DM74ALS245AWMX | Single 8-bit Bus Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74ALS245A | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Octal 3-STATE Bus Transceiver |
| DM74ALS245AJ | 制造商:National Semiconductor Corporation 功能描述:Bus Transceiver, Single, 8 Bit, 20 Pin, Ceramic, DIP |
| DM74ALS245AJ/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single 8-bit Bus Transceiver |
| DM74ALS245AMSA | 功能描述:總線收發(fā)器 Oct 3-STATE Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| DM74ALS245AMSA_Q | 功能描述:總線收發(fā)器 Oct 3-STATE Bus Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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