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參數資料
| 型號： | DM74AS74SJX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | MODULAR DEV SYSTEM |
| 中文描述： | AS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封裝： | SOP-14 |
| 文件頁數： | 1/7頁 |
| 文件大小： | 69K |
| 代理商： | DM74AS74SJX |
2000 Fairchild Semiconductor Corporation
DS006282
www.fairchildsemi.com
April 1984
Revised March 2000
D
DM74AS74
Dual D-Type Positive-Edge-Triggered Flip-Flop
with Preset and Clear
General Description
The AS74 is a dual edge-triggered flip-flops. Each flip-flop
has individual D, clock, clear and preset inputs, and also
complementary Q and Q outputs.
Information at input D is transferred to the Q output on the
positive going edge of the clock pulse. Clock triggering
occurs at a voltage level of the clock pulse and is not
directly related to the transition time of the positive going
pulse. When the clock input is at either the HIGH or LOW
level, the D input signal has no effect.
Asynchronous preset and clear inputs will set or clear Q
output respectively upon the application of LOW level sig-
nal.
Features
I
Switching specifications at 50 pF
I
Switching specifications guaranteed over full tempera-
ture and V
CC
range
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
Functionally and pin-for-pin compatible with Schottky
and LS TTL counterpart
I
Improved AC performance over S74 at approximately
half the power
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
↑
=
Positive Edge Transition
Q
0
=
Previous Condition of Q
Note 1:
This condition is nonstable; it will not persist when preset and clear
inputs return to their inactive (HIGH) level. The output levels in this condi-
tion are not guaranteed to meet the V
OH
specification.
Order Number
DM74AS74M
DM74AS74SJX
DM74AS74N
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
PR
L
H
L
H
H
CLR CLK
H
L
L
H
H
D
X
X
X
H
L
Q
H
L
Q
L
H
X
X
X
↑
↑
L
H (Note 1)
H
L
H (Note 1)
L
H
H
H
X
Q
0
Q
0
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相關代理商/技術參數 |
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| DM74AS804BN | 功能描述:邏輯門 Hex 2-Input NAND Drv RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74AS804BWM | 功能描述:邏輯門 Hex 2-Input NAND Drv RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74AS804BWMX | 功能描述:邏輯門 Hex 2-Input NAND Drv RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74AS805BN | 功能描述:邏輯門 Hex 2-Input NOR Drv RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74AS805BWM | 功能描述:邏輯門 Hex 2-Input NOR Drv RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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