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參數(shù)資料
| 型號： | DM74LS193N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Synchronous 4-Bit Binary Counter with Dual Clock |
| 中文描述： | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 74K |
| 代理商： | DM74LS193N |
2000 Fairchild Semiconductor Corporation
DS006406
www.fairchildsemi.com
September 1986
Revised March 2000
D
DM74LS193
Synchronous 4-Bit Binary Counter with Dual Clock
General Description
The DM74LS193 circuit is a synchronous up/down 4-bit
binary counter. Synchronous operation is provided by hav-
ing all flip-flops clocked simultaneously, so that the outputs
change together when so instructed by the steering logic.
This mode of operation eliminates the output counting
spikes normally associated with asynchronous (ripple-
clock) counters.
The outputs of the four master-slave flip-flops are triggered
by a LOW-to-HIGH level transition of either count (clock)
input. The direction of counting is determined by which
count input is pulsed while the other count input is held
HIGH.
The counter is fully programmable; that is, each output may
be preset to either level by entering the desired data at the
inputs while the load input is LOW. The output will change
independently of the count pulses. This feature allows the
counters to be used as modulo-N dividers by simply modi-
fying the count length with the preset inputs.
A clear input has been provided which, when taken to a
high level, forces all outputs to the low level; independent
of the count and load inputs. The clear, count, and load
inputs are buffered to lower the drive requirements of clock
drivers, etc., required for long words.
These counters were designed to be cascaded without the
need for external circuitry. Both borrow and carry outputs
are available to cascade both the up and down counting
functions. The borrow output produces a pulse equal in
width to the count down input when the counter underflows.
Similarly, the carry output produces a pulse equal in width
to the count down input when an overflow condition exists.
The counters can then be easily cascaded by feeding the
borrow and carry outputs to the count down and count up
inputs respectively of the succeeding counter.
Features
I
Fully independent clear input
I
Synchronous operation
I
Cascading circuitry provided internally
I
Individual preset each flip-flop
Ordering Code:
Connection Diagram
Order Number
DM74LS193M
DM74LS193N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74LS194A WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74LS194AM | 功能描述:計數(shù)器移位寄存器 4-Bit Shift Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| DM74LS194AMX | 功能描述:計數(shù)器移位寄存器 4-Bit Shift Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| DM74LS194AN | 功能描述:計數(shù)器移位寄存器 4-Bit Shift Reg RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| DM74LS197N | 制造商:National Semiconductor Corporation 功能描述: 制造商:Texas Instruments 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
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