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參數資料
| 型號： | DM74LS279 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Quad 2-Input NOR Gate; Package: TSSOP; No of Pins: 14; Container: Tape & Reel |
| 中文描述： | 四SR鎖存器 |
| 文件頁數： | 1/4頁 |
| 文件大?。?/td> | 47K |
| 代理商： | DM74LS279 |
2000 Fairchild Semiconductor Corporation
DS006420
www.fairchildsemi.com
August 1986
Revised March 2000
D
DM74LS279
Quad S-R Latch
General Description
The DM74LS279 consists of four individual and indepen-
dent Set-Reset Latches with active low inputs. Two of the
four latches have an additional S input ANDed with the pri-
mary S input. A LOW on any S input while the R input is
HIGH will be stored in the latch and appear on the corre-
sponding Q output as a HIGH. A LOW on the R input while
the S input is HIGH will clear the Q output to a LOW. Simul-
taneous transition of the R and S inputs from LOW-to-
HIGH will cause the Q output to be indeterminate. Both
inputs are voltage level triggered and are not affected by
transition time of the input data.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
H
=
HIGH Level
L
=
LOW Level
Q
0
=
The Level of Q before the indicated input conditions were established.
Note 1:
For latches with double S inputs:
H
=
both S inputs HIGH
L
=
one or both S inputs LOW
Note 2:
This output level is pseudo stable; that is, it may not persist when
the S and R inputs return to their inactive (HIGH) level.
Order Number
DM74LS279M
DM74LS279N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Output
S (Note 1)
L
L
H
H
R
L
H
L
H
Q
H (Note 2)
H
L
Q
0
相關PDF資料 |
PDF描述 |
|---|---|
| DM74LS279M | Quad 2-Input NOR Gate; Package: DIP; No of Pins: 14; Container: Rail |
| DM74LS279N | Quad 2-Input NOR Gate |
| DM74LS279MX | S-R-Type Latch |
| DM74LS27 | Quad 2-Input NAND Gate; Package: SOIC; No of Pins: 14; Container: Tape & Reel |
| DM74LS27M | Quad 2-Input NOR Gate |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DM74LS279 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74LS279M | 功能描述:閉鎖 Quad S-R Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74LS279MX | 功能描述:閉鎖 Quad S-R Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74LS279N | 功能描述:閉鎖 Quad S-R Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74LS27M | 功能描述:邏輯門 Trp 3-Input NOR Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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