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參數資料
| 型號： | DM93L28N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 8-Bit Shift Register |
| 中文描述： | 93 SERIES, 8-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-16 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 41K |
| 代理商： | DM93L28N |
1999 Fairchild Semiconductor Corporation
DS010200
www.fairchildsemi.com
March 1989
Revised August 1999
D
DM93L28
Dual 8-Bit Shift Register
General Description
The DM93L28 is a high speed serial storage element pro-
viding 16 bits of storage in the form of two 8-bit registers.
The multifunctional capability of this device is provided by
several features: 1) additional gating is provided at the
input to both shift registers so that the input is easily multi-
plexed between two sources; 2) the clock of each register
may be provided separately or together; 3) both the true
and complementary outputs are provided from each 8-bit
register, and both registers may be master cleared from a
common input.
Features
I
2-input multiplexer provided at data input of each
register
I
Gated clock input circuitry
I
Both true and complementary outputs provided from last
bit of each register
I
Asynchronous master reset common to both registers
Ordering Code:
Logic Symbol
V
CC
=
Pin 16
GND
=
Pin 8
Connection Diagram
Pin Descriptions
Order Number
DM93L28N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
S
D0, D1
CP
Data Select Input
Data Inputs
Clock Pulse Input (Active HIGH)
Common (Pin 9)
Separate (Pins 7 and 10)
Master Reset Input (Active LOW)
Last Stage Output
Complementary Output
MR
Q7
Q7
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| DM93S41 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:4-Bit Arithmetic Logic Unit |
| DM93S41N | 功能描述:算數邏輯單元 - ALU 4-Bit Arith Log Unit RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
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