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參數(shù)資料
| 型號： | DP84412N |
| 英文描述： | DRAM Controller |
| 中文描述： | DRAM控制器 |
| 文件頁數(shù)： | 1/46頁 |
| 文件大?。?/td> | 644K |
| 代理商： | DP84412N |
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TL/F/11718
D
D
February 1995
DP8440-40/DP8440-25/DP8441-40/DP8441-25
microCMOS Programmable 16/64 Mbit
Dynamic RAM Controller/Driver
General Description
The DP8440/41 Dynamic RAM Controllers provide an easy
interface between dynamic RAM arrays and 8-, 16-, 32- and
64-bit microprocessors. The DP8440/41 DRAM Controllers
generate all necessary control and timing signals to suc-
cessfully interface and design dynamic memory systems.
With significant enhancements over the DP8420/21/22
predecessors, the DP8440/41 are suitable for high perform-
ance memory systems. These controllers support page and
burst accesses for fast page, static column and nibble
DRAMs. Refreshes and accesses are arbitrated on chip.
RAS low time during refresh and RAS precharge time are
guaranteed by these controllers. Separate precharge coun-
ters for each RAS output avoid delayed back to back ac-
cesses due to precharge when using memory interleaving.
Programmable features make the DP8440/41 DRAM Con-
trollers flexible enough to fit many memory systems.
Features
Y
40 MHz and 25 MHz operation
Y
Page detection
Y
Automatic CPU burst accesses
Y
Support 1/4/16/64 Mbits DRAMs
Y
High capacitance drivers for RAS, CAS, WE and Q out-
puts
Y
Support for fast page, static column and nibble mode
DRAMs
Y
High precision PLL based delay line
Y
Byte enable for word size up to 32 bits on the DP8440
or 64 bits on the DP8441
Y
Automatic Internal Refresh
Y
Staggered RAS-Only refresh
Y
Burst and CAS-before-RAS refresh
Y
Error scrubbing during refresh
Y
TRI-STATE
é
outputs
Y
Easy interface to all major microprocessors
Block Diagram
TL/F/11718–1
FIGURE 1
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DP8441VLJ | DRAM Controller |
| DP84422BN | DRAM Controller |
| DP84422J | DRAM Controller |
| DP84422N | DRAM Controller |
| DP84432J | DRAM Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DP84412N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP84412N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP8441VLJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP8441VLJ-25 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/Driver |
| DP8441VLJ-40 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/Driver |
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