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參數(shù)資料
| 型號(hào)： | DS1005 |
| 英文描述： | 5-Tap Silicon Delay Line |
| 中文描述： | 5抽頭硅延遲線 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大小： | 62K |
| 代理商： | DS1005 |
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111799
FEATURES
All-silicon time delay
5 taps equally spaced
Delay tolerance ±2 ns or ±3%, whichever is
greater
Stable and precise over temperature and
voltage range
Leading and trailing edge accuracy
Economical
Auto-insertable, low profile
Standard 14-pin DIP, 8-pin DIP, or 16-pin
SOIC
Tape and reel available for surface-mount
Low-power CMOS
TTL/CMOS compatible
Vapor phase, IR and wave solderability
Custom delays available
Quick turn prototypes
Extended temperature range available
PIN ASSIGNMENT
PIN DESCRIPTION
TAP 1-TAP 5 - TAP Output Number
V
CC
- +5 Volts
GND
- Ground
NC
- No Connection
IN
- Input
DESCRIPTION
The DS1005 5-Tap Silicon Delay Line provides five equally spaced taps with delays ranging from 12 ns
to 250 ns, with an accuracy of
±
2 ns or
±
3%, whichever is greater. This device is offered in a standard 14-
pin DIP, making it compatible with existing delay line products. Space-saving 8-pin DIPs and 16-pin
SOICs are also available. Both enhanced performance and superior reliability over hybrid technology is
achieved by the combination of a 100% silicon delay line and industry standard DIP and SOIC
packaging. In order to maintain complete pin compatibility, DIP packages are available with hybrid lead
configurations. The DS1005 reproduces the input logic level at each tap after the fixed delay specified by
the dash number in Table 1. The device is designed with both leading and trailing edge accuracy. Each
tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can customize standard products to
meet special needs. For special requests and rapid delivery, call (972) 371–4348.
DS1005
5-Tap Silicon Delay Line
www.dalsemi.com
IN
NC
NC
TAP 2
TAP 4
NC
GND
NC
NC
NC
TAP 5
TAP 3
TAP 1
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
DS1005 14-Pin DIP (300-mil)
See Mech. Drawings Section
IN
TAP 2
TAP 4
GND
V
CC
TAP 1
TAP 3
TAP 5
1
2
3
4
6
5
8
7
DS1005M 8-Pin DIP (300-mil)
See Mech. Drawings Section
DS1005S 16-Pin SOIC
(300-mil)
See Mech. Drawings Section
IN
NC
NC
TAP 2
TAP 4
NC
GND
NC
NC
NC
TAP 5
TAP 3
TAP 1
V
CC
1
2
3
4
5
6
7
16
15
14
13
12
8
9
10
11
NC
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1007 | 7-1 Silicon Delay Line |
| DS1007-13 | 7-1 Silicon Delay Line |
| DS1007-14 | 7-1 Silicon Delay Line |
| DS1007-2 | 7-1 Silicon Delay Line |
| DS1007-3 | 7-1 Silicon Delay Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1005-100 | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1005-125 | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1005-125+ | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1005-150 | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1005-175 | 功能描述:延遲線/計(jì)時(shí)元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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