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參數資料
| 型號： | DSP56321VL240 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 元件分類： | 數字信號處理 |
| 英文描述： | 24-Bit Digital Signal Processor |
| 中文描述： | 24位數字信號處理器 |
| 文件頁數： | 1/84頁 |
| 文件大小： | 898K |
| 代理商： | DSP56321VL240 |
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Freescale Semiconductor
Technical Data
DSP56321
Rev. 11, 2/2005
Freescale Semiconductor, Inc., 2001, 2005. All rights reserved.
DSP56321
24-Bit Digital Signal Processor
The Freescale DSP56321, a member of the DSP56300 DSP family, supports networking, security encryption, and
home entertainment using a high-performance, single-clock-cycle-per- instruction engine (DSP56000 code-
compatible), a barrel shifter, 24-bit addressing, an instruction cache, and a direct memory access (DMA) controller
(see
Figure 1
).
The DSP56321 offers 275 million multiply- accumulates per second (MMACS) performance, attaining 550
MMACS when the EFCOP is in use. It operates with an internal 275 MHz clock with a 1.6 volt core and
independent 3.3 volt input/output (I/O) power. By operating in parallel with the core, the EFCOP provides overall
enhanced performance and signal quality with no impact on channel throughput or total channel support. This
device is pin-compatible with the Freescale DSP56303, DSP56L307, DSP56309, and DSP56311.
Figure 1.
DSP56321 Block Diagram
YAB
XAB
PAB
DAB
YDB
XDB
PDB
GDB
MODB/IRQB
MODC/IRQC
MODD/IRQD
10
DSP56300
Core
6
16
24-Bit
24
18
DDB
Peripheral
Expansion Area
Y
X
P
P
6
5
3
RESET
PINIT/NMI
MODA/IRQA
EXTAL
XTAL
Address
Control
Data
Address
Generation
Unit
Six Channel
DMA Unit
Program
Interrupt
Controller
Program
Decode
Controller
Program
Address
Generator
24
24 Data ALU
→
56-bit MAC
Two 56-bit Accumulators
56-bit Barrel Shifter
Power
Management
EBus
Intand
IControl
Memory Expansion Area
DE
Program
RAM
32 K
×
24 bits
or
31 K
×
24 bits
and
X Data
RAM
80 K
×
24 bits
Y Data
RAM
80 K
×
24 bits
External
Address
Bus
Switch
SCI
EFCOP
ESSI
HI08
Triple
Timer
Instruction
Cache
1024
×
24 bits
Bootstrap
ROM
OnCE
JTAG
PLL
Clock
Generator
Internal
Data
Bus
Switch
External
Data
Bus
Switch
The DSP56321 is intended
for applications requiring a
large amount of internal
memory, such as networking
and wireless infrastructure
applications. The onboard
EFCOP can accelerate
general filtering applications,
such as echo-cancellation
applications, correlation, and
general-purpose convolution-
based algorithms.
What’s New
Rev. 11 includes the following
changes:
Adds lead-free packaging and
part numbers.
相關PDF資料 |
PDF描述 |
|---|---|
| DSP56321VL275 | 24-Bit Digital Signal Processor |
| DSP56364P | 24-Bit Audio Digital Signal Processor |
| DSP56366P | 24-Bit Audio Digital Signal Processor |
| DSP56366UM | 24-Bit Audio Digital Signal Processor |
| DSP56367P | 24-Bit Audio Digital Signal Processor |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DSP56321VL275 | 功能描述:數字信號處理器和控制器 - DSP, DSC 24 BIT DSP PBFREE RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| DSP56321VL275 | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor (DSP) IC |
| DSP56362 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56362AD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56362D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:24-Bit Audio Digital Signal Processor |
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