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atc93c46 存儲ic,

品牌 atc 型號 atc93c46
封裝 sop8 批號 2008
類型 通信IC
atc93c46.需要的請聯系,詳細介紹請到www.szmoho.com features ? low-voltage and standard-voltage operation – 2.7 (vcc = 2.7v to 5.5v) – 1.8 (vcc = 1.8v to 5.5v) ? user-selectable internal organization – 1k: 128 x 8 or 64 x 16 ? three-wire serial interface ? 2 mhz clock rate (5v) ? self-timed write cycle (10 ms max) ? high reliability – endurance: 1 million write cycles – data retention: 100 years ? automotive grade devices available ? 8-lead jedec pdip, 8-lead jedec soic, 8-lead eiaj soic, 8-lead mini-map (mlp 2x3), 8-lead tssop and 8-ball dbga2 packages description the at93c46 provides 1024 bits of serial electrically erasable programmable readonly memory (eeprom), organized as 64 words of 16 bits each (when the org pin is connected to vcc), and 128 words of 8 bits each (when the org pin is tied to ground). the device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. the at93c46 is available in space-saving 8-lead pdip, 8-lead jedec soic, 8-lead eiaj soic, 8-lead mini-map (mlp 2x3), 8-lead tssop, and 8-lead dbga2 packages. the at93c46 is enabled through the chip select pin (cs) and accessed via a three-wire serial interface consisting of data input (di), data output (do), and shift clock (sk). upon receiving a read instruction at di, the address is decoded and the data is clocked out serially on the do pin. the write cycle is completely self-timed, and no separate erase cycle is required before write. the write cycle is only enabled when the part is in the erase/write enable state. when cs is brought high following the initiation of a write cycle, the do pin outputs the ready/busy status of the part. the at93c46 is available in 2.7v to 5.5v and 1.8v to 5.5v versions
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