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| 型號： | EDGE4707B |
| 英文描述： | Edge4707B PPMU Settling Time & Stability (224k) |
| 中文描述： | Edge4707B PPMU建立時間 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 224K |
| 代理商： | EDGE4707B |
1
TEST AND MEASUREMENT PRODUCTS
www .semtech.com
PMU-A2
Edge4707B PPMU
Settling Time and Stability
Revision 1 / November 8, 2002
Introduction
To maximize throughput in Automated Test Systems (ATE),
reducing the time required to make DC measurements is
of paramount importance. The limiting factor is often the
time the Per-Pin Measurement Unit (PPMU) output takes
to settle to the accuracy required to make the
measurement. This time is dependent on system factors
such as the parasitic capacitance of the Device Under
Test (DUT) node and measurement accuracy requirements,
as well as the PPMU design and the external Components.
Virtually all PPMU measurements fall into one of two
categories: Either a voltage is forced on a DUT pin and
the current is measured, or a current is forced and the
voltage is measured. Since more PPMU measurements
are performed in the Force Voltage/Measure Current mode,
this article will deal primarily with this operating mode.
(The Force Current/Measure Voltage mode optimization
techniques and limiting factors are similar to those
described here).
A simplified block diagram of the Edge4707B PPMU is
shown in Figure 1. This device consists of a driver amplifier,
a selectable external sense resistor, a differential amplifier
which outputs a voltage proportional to the current though
the sense resistor, and a switch which determines whether
the feedback to the driver amplifier comes from the external
sense input (force voltage mode) or from the differential
amplifier (force current mode).
Also included are
connections for a number of external compensation
capacitors which can be selected to optimize the
performance of the part. This document deals primarily
with explaining the characteristics of this type of circuit
and how to optimize the output waveform for a particular
ATE system’s requirements.
Figure 1. Edge4707B Simplified Block Diagram
(for more detail, see the functional schematic in the Edge4707B Datasheet)
+
–
+
–
COMP1–COMP2
COMP3
COMP4–RESIN
External Sense R
40K
FV/FI
Select
Switch
MV/MI
Select
Switch
Diff Amp
Driver
Force Output
Sense Input
IVMON Output
Output
Disconnect
Force/Sense
tied together
externally
Analog Input Signal
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