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參數資料
型號: EDL1216CASA-10
英文描述: Programmable VCOM; Temperature Range: -40°C to 85°C; Package: 24-QFN
中文描述: 內存| 4X2MX16 |的CMOS | BGA封裝| 54PIN |塑料
文件頁數: 1/59頁
文件大?。?/td> 489K
代理商: EDL1216CASA-10
Document No. E0196E20 (Ver. 2.0)
Date Published March 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
DATA SHEET
128M bits Mobile RAM
EDL1216AASA (8M words
×××× 16 bits)
Description
The EDL1216AA is a 128M bits Mobile RAM organized
as 2,097,152 words
× 16 bits × 4 banks. The low
power synchronous DRAMs achieved low power
consumption and high-speed data transfer using the
pipeline architecture.
All inputs and outputs are
synchronized with the positive edge of the clock.
This product is packaged in 54-ball FBGA.
Features
Low power supply
VDD:
2.5V
± 0.2V
VDDQ: 1.8V ± 0.15V
Wide temperature range (25°C to 85°C)
Programmable partial self refresh
Programmable driver strength
Programmable temperature compensated self refresh
(Option)
Deep power down mode
Small package (54-ball FBGA)
Fully Synchronous Dynamic RAM, with all signals
referenced to a positive clock edge
Pulsed interface
Possible to assert random column address in every
cycle
Quad internal banks controlled by BA0 (A13) and
BA1 (A12)
Byte control by LDQM and UDQM
Wrap sequence = Sequential / Interleave
/CAS latency (CL) = 2, 3
Automatic precharge and controlled precharge
Auto refresh and self refresh
×16 organization
4,096 refresh cycles/64ms
Burst termination by Burst stop command and
Precharge command
Applications
Mobile cellular handset, PDA, wireless PDA, handheld
PC, home electronic appliances, and information
appliances, etc.
Pin Configurations
/xxx indicates active low signal.
VSS
1
A
B
C
D
E
F
G
H
J
23456789
DQ14
DQ12
DQ10
DQ8
UDQM
NC
A8
VSS
DQ15
DQ13
DQ11
DQ9
NC
CLK
A11
A7
A5
VSSQ
VDDQ
VSSQ
VDDQ
VSS
CKE
A9
A6
A4
VDDQ
VSSQ
VDDQ
VSSQ
VDD
/CAS
BA0
A0
A3
DQ0
DQ2
DQ4
DQ6
LDQM
/RAS
BA1
A1
A2
VDD
DQ1
DQ3
DQ5
DQ7
/WE
/CS
A10
VDD
(Top view)
A0 to A11
Address inputs
BA0, BA1
Bank Select
DQ0 to DQ15
Data inputs / outputs
CLK
Clock input
CKE
Clock enable
/CS
Chip select
/RAS
Row address strobe
/CAS
Column address strobe
/WE
Write enable
UDQM
Upper DQ mask enable
LDQM
Lower DQ mask enable
VDD
Supply voltage
VSS
Ground
VDDQ
Supply voltage for DQ
VSSQ
Ground for DQ
NC
No connect
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