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2013-06-28 - EFM32G290FXX - d0007_Rev1.60
53
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Alternate
LOCATION
Functionality
0
1
2
3
Description
LEU1_TX
PC6
PA5
LEUART1 Transmit output. Also used as receive input in half duplex commu-
nication.
LFXTAL_N
PB8
Low Frequency Crystal (typically 32.768 kHz) negative pin. Also used as an
optional external clock input pin.
LFXTAL_P
PB7
Low Frequency Crystal (typically 32.768 kHz) positive pin.
PCNT0_S0IN
PC13
PE0
PC0
Pulse Counter PCNT0 input number 0.
PCNT0_S1IN
PC14
PE1
PC1
Pulse Counter PCNT0 input number 1.
PCNT1_S0IN
PC4
PB3
Pulse Counter PCNT1 input number 0.
PCNT1_S1IN
PC5
PB4
Pulse Counter PCNT1 input number 1.
PCNT2_S0IN
PD0
PE8
Pulse Counter PCNT2 input number 0.
PCNT2_S1IN
PD1
PE9
Pulse Counter PCNT2 input number 1.
TIM0_CC0
PA0
PF6
PD1
Timer 0 Capture Compare input / output channel 0.
TIM0_CC1
PA1
PF7
PD2
Timer 0 Capture Compare input / output channel 1.
TIM0_CC2
PA2
PF8
PD3
Timer 0 Capture Compare input / output channel 2.
TIM0_CDTI0
PA3
PC13
PF3
PC13
Timer 0 Complimentary Deat Time Insertion channel 0.
TIM0_CDTI1
PA4
PC14
PF4
PC14
Timer 0 Complimentary Deat Time Insertion channel 1.
TIM0_CDTI2
PA5
PC15
PF5
PC15
Timer 0 Complimentary Deat Time Insertion channel 2.
TIM1_CC0
PC13
PE10
PB0
Timer 1 Capture Compare input / output channel 0.
TIM1_CC1
PC14
PE11
PB1
Timer 1 Capture Compare input / output channel 1.
TIM1_CC2
PC15
PE12
PB2
Timer 1 Capture Compare input / output channel 2.
TIM2_CC0
PA8
PA12
PC8
Timer 2 Capture Compare input / output channel 0.
TIM2_CC1
PA9
PA13
PC9
Timer 2 Capture Compare input / output channel 1.
TIM2_CC2
PA10
PA14
PC10
Timer 2 Capture Compare input / output channel 2.
U0_RX
PF7
PE1
PA4
PC15
UART0 Receive input.
U0_TX
PF6
PE0
PA3
PC14
UART0 Transmit output. Also used as receive input in half duplex communi-
cation.
US0_CLK
PE12
PE5
PC9
USART0 clock input / output.
US0_CS
PE13
PE4
PC8
USART0 chip select input / output.
US0_RX
PE11
PE6
PC10
USART0 Asynchronous Receive.
USART0 Synchronous mode Master Input / Slave Output (MISO).
US0_TX
PE10
PE7
PC11
USART0 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART0 Synchronous mode Master Output / Slave Input (MOSI).
US1_CLK
PB7
PD2
USART1 clock input / output.
US1_CS
PB8
PD3
USART1 chip select input / output.
US1_RX
PC1
PD1
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output (MISO).
US1_TX
PC0
PD0
USART1 Asynchronous Transmit.Also used as receive input in half duplex
communication.
USART1 Synchronous mode Master Output / Slave Input (MOSI).
US2_CLK
PC4
PB5
USART2 clock input / output.
US2_CS
PC5
PB6
USART2 chip select input / output.
US2_RX
PC3
PB4
USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output (MISO).