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參數(shù)資料
型號(hào): EP1K30TI144-2
廠商: Altera
文件頁(yè)數(shù): 1/86頁(yè)
文件大小: 0K
描述: IC ACEX 1K FPGA 30K 144-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 180
系列: ACEX-1K®
LAB/CLB數(shù): 216
邏輯元件/單元數(shù): 1728
RAM 位總計(jì): 24576
輸入/輸出數(shù): 102
門數(shù): 119000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
產(chǎn)品目錄頁(yè)面: 602 (CN2011-ZH PDF)
其它名稱: 544-1068
Altera Corporation
1
ACEX 1K
Programmable Logic Device Family
May 2003, ver. 3.4
Data Sheet
DS-ACEX-3.4
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Features...
Programmable logic devices (PLDs), providing low cost
system-on-a-programmable-chip (SOPC) integration in a single
device
Enhanced embedded array for implementing megafunctions
such as efficient memory and specialized logic functions
Dual-port capability with up to 16-bit width per embedded array
block (EAB)
Logic array for general logic functions
High density
10,000 to 100,000 typical gates (see Table 1)
Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be
used without reducing logic capacity)
Cost-efficient programmable architecture for high-volume
applications
Cost-optimized process
Low cost solution for high-performance communications
applications
System-level features
MultiVoltTM I/O pins can drive or be driven by 2.5-V, 3.3-V, or
5.0-V devices
Low power consumption
Bidirectional I/O performance (setup time [tSU] and clock-to-
output delay [tCO]) up to 250 MHz
Fully compliant with the peripheral component interconnect
Special Interest Group (PCI SIG) PCI Local Bus Specification,
Revision 2.2
for 3.3-V operation at 33 MHz or 66 MHz
Extended temperature range
Table 1. ACEXTM 1K Device Features
Feature
EP1K10
EP1K30
EP1K50
EP1K100
Typical gates
10,000
30,000
50,000
100,000
Maximum system gates
56,000
119,000
199,000
257,000
Logic elements (LEs)
576
1,728
2,880
4,992
EABs
3
6
10
12
Total RAM bits
12,288
24,576
40,960
49,152
Maximum user I/O pins
136
171
249
333
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K30TI144-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 216 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Logic Device Family
EP1K50FC256-1 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - ACEX 1K 360 LABs 186 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC256-1DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC256-1F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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