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參數資料
型號: EVAL-AD5064EBZ
廠商: Analog Devices Inc
文件頁數: 1/28頁
文件大小: 0K
描述: BOARD EVAL FOR AD5064
產品培訓模塊: DAC Architectures
標準包裝: 1
系列: nanoDAC™
DAC 的數量: 4
位數: 16
采樣率(每秒): 125k
數據接口: 串行
設置時間: 8µs
DAC 型: 電壓
工作溫度: -40°C ~ 125°C
已供物品:
已用 IC / 零件: AD5064
Fully Accurate, 12-/14-/16-Bit VOUT nanoDAC, Quad,
SPI Interface, 4.5 V to 5.5 V in TSSOP
Data Sheet
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2008–2013 Analog Devices, Inc. All rights reserved.
FEATURES
Low power quad 12-/14-/16-bit DAC, ±1 LSB INL
Pin compatible and performance upgrade to AD5666
Individual and common voltage reference pin options
Rail-to-rail operation
4.5 V to 5.5 V power supply
Power-on reset to zero scale or midscale
3 power-down functions and per-channel power-down
Hardware LDAC with software LDAC override function
CLR function to programmable code
SDO daisy-chaining option
14-/16-lead TSSOP
Internal reference buffer and internal output amplifier
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAMS
06803-
064
INTERFACE
LOGIC AND
SHIFT
REGISTER
INPUT
REGISTER
DIN
SDO
LDAC
GND
VDD
LDAC
VREFIN
SYNC
SCLK
AD5064-1
CLR
VOUTA
VOUTB
VOUTC
VOUTD
DAC
REGISTER
DAC A
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC B
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC C
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC D
BUFFER
POR
POWER-DOWN
LOGIC
POWER-ON
RESET
Figure 1. AD5064-1 Functional Equivalent and Pin Compatible with AD5666
INTERFACE
LOGIC AND
SHIFT
REGISTER
INPUT
REGISTER
DIN
LDAC
GND
VDD
LDAC
VREFA
SYNC
SCLK
AD5024/
AD5044/
AD5064
CLR
VOUTA
VOUTB
VOUTC
VOUTD
DAC
REGISTER
DAC A
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC B
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC C
BUFFER
INPUT
REGISTER
DAC
REGISTER
DAC D
BUFFER
VREFB
VREFC VREFD
POR
POWER-DOWN
LOGIC
POWER-ON
RESET
06803-
001
Figure 2. AD5024/AD5044/AD5064 with Individual Reference Pins
GENERAL DESCRIPTION
12-/14-/16-bit buffered voltage output nanoDAC converters
that offer relative accuracy specifications of 1 LSB INL and 1 LSB
DNL with the AD5024/AD5044/AD5064 individual reference
pin and the AD5064-1 common reference pin options. The
AD5024/AD5044/AD5064/AD5064-1 can operate from a single
4.5 V to 5.5 V supply. The AD5024/AD5044/AD5064/AD5064-1
also offer a differential accuracy specification of ±1 LSB. The
parts use a versatile 3-wire, low power Schmitt trigger serial
interface that operates at clock rates up to 50 MHz and is compati-
ble with standard SPI, QSPI, MICROWIRE, and DSP interface
standards. Integrated reference buffers and output amplifiers are
also provided on-chip. The AD5024/AD5044/AD5064/AD5064-1
incorporate a power-on reset circuit that ensures the DAC
output powers up to zero scale or midscale and remains there
until a valid write takes place to the device. The AD5024/AD5044/
AD5064/AD5064-1 contain a power-down feature that reduces
the current consumption of the device to typically 400 nA at 5 V
and provides software selectable output loads while in power-
down mode. Total unadjusted error for the parts is <2 mV.
PRODUCT HIGHLIGHTS
1. Quad channel available in 14-/16-lead TSSOP packages.
2. 16-bit accurate, 1 LSB INL.
3. High speed serial interface with clock speeds up to 50 MHz.
4. Reset to known output voltage (zero scale or midscale).
Table 1. Related Devices
Part No.
Description
Quad,16-bit buffered DAC,
16 LSB INL, TSSOP
Dual, 16-bit buffered DACs,
1 LSB INL, TSSOP
16-bit nanoDAC, 1 LSB INL, SOT-23,
MSOP
16-bit nanoDAC, 4 LSB INL, SOT-23
14-/16-bit nanoDAC, 1 LSB INL,
SOT-23
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