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參數資料
| 型號： | EVAL-ADM2582EEBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 18/20頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADM2582 |
| 標準包裝： | 1 |
| 系列： | isoPower® |
| 主要目的： | 接口，收發器，RS-485 |
| 已用 IC / 零件： | ADM2582 |
| 已供物品： | 板 |
ADM2582E/ADM2587E
Rev. C | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND1 1
VCC 2
GND1 3
RxD 4
GND2
20
VISOIN
19
A
18
B
17
RE 5
GND2
16
DE 6
Z
15
TxD 7
GND2
14
VCC 8
Y
13
GND1 9
VISOOUT
12
GND1 10
GND2
11
NOTES
1. PIN 12 AND PIN 19 MUST BE
CONNECTED EXTERNALLY.
ADM2582E
ADM2587E
TOP VIEW
(Not to Scale)
08
11
1-
0
02
Figure 2. Pin Configuration
Table 10. Pin Function Description
Pin No.
Mnemonic
Description
1
GND1
Ground, Logic Side.
2
VCC
Logic Side Power Supply. It is recommended that a 0.1 μF and a 0.01 μF decoupling capacitor be fitted between
Pin 2 and Pin 1.
3
GND1
Ground, Logic Side.
4
RxD
Receiver Output Data. This output is high when (A B) ≥ 30 mV and low when (A B) ≤ –200 mV.
The output is tristated when the receiver is disabled, that is, when RE is driven high.
5
RE
Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it
high disables the receiver.
6
DE
Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver.
7
TxD
Driver Input. Data to be transmitted by the driver is applied to this input.
8
VCC
Logic Side Power Supply. It is recommended that a 0.1 μF and a 10 μF decoupling capacitor be fitted between
Pin 8 and Pin 9.
9
GND1
Ground, Logic Side.
10
GND1
Ground, Logic Side.
11
GND2
Ground, Bus Side.
12
VISOOUT
Isolated Power Supply Output. This pin must be connected externally to VISOIN. It is recommended that a reservoir
capacitor of 10 μF and a decoupling capacitor of 0.1 μF be fitted between Pin 12 and Pin 11.
13
Y
Driver Noninverting Output
14
GND2
Ground, Bus Side.
15
Z
Driver Inverting Output
16
GND2
Ground, Bus Side.
17
B
Receiver Inverting Input.
18
A
Receiver Noninverting Input.
19
VISOIN
Isolated Power Supply Input. This pin must be connected externally to VISOOUT. It is recommended that a
0.1 μF and a 0.01 μF decoupling capacitor be fitted between Pin 19 and Pin 20.
20
GND2
Ground, Bus Side.
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