參數資料
| 型號： | EX128-FTQG64 |
| 廠商： | Microsemi SoC |
| 文件頁數： | 1/48頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA ANTIFUSE 6K 64-TQFP |
| 標準包裝： | 160 |
| 系列： | EX |
| 邏輯元件/單元數： | 256 |
| 輸入/輸出數： | 46 |
| 門數： | 6000 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-TQFP（10x10） |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
Revision 10
October 2012
I
2012 Microsemi Corporation
eX Family FPGAs
Leading Edge Performance
240 MHz System Performance
350 MHz Internal Performance
3.9 ns Clock-to-Out (Pad-to-Pad)
Specifications
3,000 to 12,000 Available System Gates
Maximum 512 Flip-Flops (Using CC Macros)
0.22 m CMOS Process Technology
Up to 132 User-Programmable I/O Pins
Features
High-Performance, Low-Power Antifuse FPGA
LP/Sleep Mode for Additional Power Savings
Advanced Small-Footprint Packages
Hot-Swap Compliant I/Os
Single-Chip Solution
Nonvolatile
Live on Power-Up
No Power-Up/Down Sequence Required for Supply
Voltages
Configurable Weak-Resistor Pull-Up or Pull-Down for
Tristated Outputs during Power-Up
Individual Output Slew Rate Control
2.5 V, 3.3 V, and 5.0 V Mixed-Voltage Operation with
5.0V Input Tolerance and 5.0V Drive Strength
Software Design Support with Microsemi Designer and
Libero Integrated Design Environment (IDE) Tools
Up to 100% Resource Utilization with 100% Pin Locking
Deterministic Timing
Unique In-System Diagnostic and Verification Capability
with Silicon Explorer II
Boundary Scan Testing in Compliance with IEEE
Standard 1149.1 (JTAG)
Fuselock Secure Programming Technology Designed
to Prevent Reverse Engineering and Design Theft
Product Profile
Device
eX64
eX128
eX256
Capacity
System Gates
Typical Gates
3,000
2,000
6,000
4,000
12,000
8,000
Register Cells
Dedicated Flip-Flops
Maximum Flip-Flops
64
128
256
512
Combinatorial Cells
128
256
512
Maximum User I/Os
84
100
132
Global Clocks
Hardwired
Routed
1
2
1
2
1
2
Speed Grades
–F, Std, –P
Temperature Grades*
C, I, A
Package (by pin count)
TQ
64, 100
100
Note: *Refer to the eX Automotive Family FPGAs datasheet for details on automotive temperature offerings.
相關PDF資料 |
PDF描述 |
|---|---|
| EX64-PTQ64 | IC FPGA ANTIFUSE 3K 64-TQFP |
| ACM43DRTN-S13 | CONN EDGECARD EXTEND 86POS 0.156 |
| ABM43DRTN-S13 | CONN EDGECARD EXTEND 86POS .156 |
| BR25L010FJ-WE2 | IC EEPROM 1KBIT 5MHZ 8SOP |
| ACM43DRTH-S13 | CONN EDGECARD EXTEND 86POS 0.156 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| EX128-PCS100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX128-PCS100A | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Family FPGAs |
| EX128-PCS100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX128-PCS100PP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX128-PCS128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
發布緊急采購，3分鐘左右您將得到回復。