
FA5304AP(S)/FA5305AP(S)
12
2. Disabling overload shutdown function
As shown in Figure 24, connect a 330k
to 470k
resistor
between the CS pin and ground. Then, the CS pin voltage
does not rise high enough to reach the reference voltage
(7.0V) of the latch comparator, and the IC does not enter the
OFF latch mode. With this connection, the overvoltage
shutdown function is not available.
3. Setting soft start period and OFF latch delay
independently
Figure 25 shows a circuit for setting the soft start period and
OFF latch delay independently. In this circuit, capacitance C
S
determines the soft start period, and capacitance C
L
determines the OFF latch delay. If the overload shutdown and
overvoltage shutdown functions raise the CS pin voltage to
around 5V, zener diode Zn becomes conductive to charge C
L
.
The OFF latch delay can be thus prolonged by C
L
.
4. Laying out Vcc and ground lines
Figure 26 and Figure 27 show the recommended layouts of
V
CC
and ground lines. The bold lines represent paths carrying
large currents. The lines must have an adequate thickness.
5. Sink current setting for CS terminal
A sink current to CS terminal must be satisfied the following
condition to prevent from the malfunction which uncontrolled
pulse output generates at OUT terminal when latch-mode
protection should be operated for overvoltage.
150
μ
A < Ics(sink) < 500
μ
A at Vcs= 6.5(V)
Ics(sink): Sink current to CS terminal
Example (for the circuit shown in Fig. 28 )
Ics(sink) = (28(V)–18(V)– 6.5(V))/7.5(k
)
6
467 (
μ
A) < 500 (
μ
A)
Fig. 25 Independent setting of soft-start period and OFF latch
delay
Fig. 26 Vcc line and ground line for FA5304A
CS
VCC
7.5k
18V Zener diode
Under 500
μ
A
Fig. 24 Disabling overload shutdown function
Fig. 27 Vcc line and ground line for FA5305A
Fig. 28 Setting sink current for CS terminal