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參數資料
| 型號： | FAN5071M |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | Analog IC |
| 中文描述： | SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數： | 2/15頁 |
| 文件大小： | 424K |
| 代理商： | FAN5071M |
FAN5071
2
REV. 1.0.4 1/29/02
Start and current limiting. The linears start instantly, not
waiting for softstart. The FAN5071 is available in a 24 pin
SOIC package.
Pin Assignments
24
23
22
21
20
19
18
17
16
15
14
13
FAN5071
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VADJGATE
VADJFB
VCKGATE
VCKFB
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
TYPEDET
VAGPGATE
VAGPFB
1
2
3
4
5
6
7
8
9
10
11
12
Pin Definitions
Pin Number
1
Pin Name
HIDRV
Pin Function Description
Connect this pin to the gate of an N-channel MOSFET. The
trace from this pin to the MOSFET gate should be <0.5".
High Side Driver Source and Low Side Driver Drain Switching Node.
with DROOP and ILIM pins allows FET sensing for V
Analog Ground.
Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
Voltage Identification Code Inputs.
These open collector/TTL compatible inputs
will program the output voltage over the ranges specified in Table 1.
Gate Driver for VADJ Transistor.
For Adjustable output.
Voltage Feedback for VADJ.
Gate Driver for VCK Transistor.
For 2.5V output.
Voltage Feedback for VCK.
Voltage Feedback for VAGP.
Gate Driver for VAGP Transistor.
For 3.3/1.5V output.
Type Detect.
Sets 3.3V or 1.5V for AGP.
Output Enable.
A logic LOW on this pin will disable all outputs. An internal current
source allows for open collector control. This pin also doubles as soft start for the
switcher.
Power Good Flag.
An open collector output that will be logic LOW if any output
voltage is not within ±14% of the nominal output voltage setpoint.
V
CC
Current Feedback.
Pin 18 is used in conjunction with pin 2 as the input for the
V
CC
current feedback control loop. Layout of these traces is critical to system
performance. See Application Information for details.
Droop Set.
Use this pin to set magnitude of active droop.
Vcc Voltage Feedback.
Pin 20 is used as the input for the V
control loop. See Application Information for details regarding correct layout.
Analog V
CC
.
Connect to system 5V supply and decouple with a 0.1μF ceramic
capacitor.
Power Ground.
Return pin for high currents flowing in pin 24 (V
V
CC
Low Side FET Driver.
Connect this pin to the gate of an N-channel MOSFET
for synchronous operation. The trace from this pin to the MOSFET gate should be
<0.5".
Power V
CC
.
For all FET drivers. Connect to system 12V supply through a 33
decouple with a 1μF ceramic capacitor.
High Side FET Driver.
2
SW
Together
CC
current.
3
GNDA
4-8
VID4-0
9
VADJGATE
VADJFB
VCKGATE
VCKFB
VAGPFB
VAGPGATE
TYPEDET
ENABLE/SS
10
11
12
13
14
15
16
17
PWRGD
18
ILIM
19
20
DROOP
VFB
CC
voltage feedback
21
VCCA
22
23
GNDP
LODRV
CCP
).
24
VCCP
, and
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