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參數(shù)資料
| 型號(hào)： | FAN5182QSCX_NL |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Adjustable Output 1, 2, or 3-Phase Synchronous Buck Controller |
| 中文描述： | SWITCHING CONTROLLER, 3000 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | LEAD FREE, MO-137AD, QSOP-20 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 788K |
| 代理商： | FAN5182QSCX_NL |
13
www.fairchildsemi.com
FAN5182 Rev. 1.0.1
F
Selecting a Standard Inductor
The following power inductor manufacturers can provide design
consultation and deliver power inductors optimized for high
power applications upon request.
Coilcraft
(847) 639-6400
www.coilcraft.com
Coiltronics
(561) 752-5000
www.coiltronics.com
Sumida Electric Company
(510) 668-0660
www.sumida.com
Vishay Intertechnology
(402) 563-6866
www.vishay.com
Output Current Sense
The output current can be measured by summing the voltage
across each inductor and passing the signal through a low-pass
filter. The CS amplifier is configured with resistors R
PH(X)
(for
summing the voltage), and R
CS
and C
CS
(for the low-pass filter).
The output current I
O
is set by the following equations:
(6)
(7)
where:
R
L
is the DCR of the output inductors.
V
DRP
is the voltage drop from CSCOMP to CSREF.
When load current reaches its limit, V
DRP
is at its maximum
(V
DRPMAX
). V
DRPMAX
can be in the range of 100mV to 200mV.
In this example, it is 110mV.
One has the flexibility of choosing either R
CS
or R
PH(X)
. It is rec-
ommended to select R
CS
equal to 100k
, and then solve for
R
PH(X)
by rearranging Equation 6.
Next, use Equation 7 to solve for C
CS
.
Choose the closest standard value that is greater than the result
given by Equation 7. This example uses a C
CS
value of 5.6nF.
Output Voltage
FAN5182 has an internal FBRTN referred 800mV voltage refer-
ence (V
REF
). The output voltage can be set by using a voltage
divider consists of resistors R
B1
and R
B2
:
(8)
Rearranging Equation 8 to solve R
B2
and assuming a 1%, 1k
resistor for R
B1
yields
The closest standard 1% resistor value for R
B2
is 1.24k
.
Power MOSFETs
For this example, one high-side and one low-side N-channel
power MOSFETs per phase have been selected. The main
selection parameters for power MOSFETs are V
GS(TH)
, Q
G
,
C
ISS
, C
RSS
, and R
DS(ON)
. The minimum gate drive voltage (the
supply voltage to the FAN5009) dictates whether standard
threshold or logic-level threshold MOSFETs can be used. With
V
GATE
~10V, logic-level threshold MOSFETs (V
GS(TH)
< 2.5V)
are recommended.
The maximum output current (I
O
) determines the R
DS(ON)
requirement for the low-side (synchronous) MOSFETs. With
good current balance among phases, the current in each low-
side MOSFET is the output current divided by the total number
of low-side MOSFETs (n
SF
). Since conduction loss is dominant
in low-side MOSFET, the following expression can represent
total power dissipation in each synchronous MOSFET in terms
of the ripple current per phase (I
R
) and the total output current
(I
O
):
(9)
Knowing the maximum output current and the maximum
allowed power dissipation, one can determine the required
R
DS(ON)
for the MOSFET. For example, D-PAK MOSFETs oper-
ating up to ambient temperature of 50°C, a safe limit for P
SF
is
around 1W to 1.5W at 120°C junction temperature. Therefore, in
this example, R
DS(SF)
(per MOSFET) < 7.5m
. This R
DS(SF)
is
typically measured at junction temperature of about 120°C In
this example, we select a lower-side MOSFET with 4.8m
at
120°C.
Another important consideration for choosing the synchronous
MOSFET is the input capacitance and feedback capacitance.
The ratio of feedback to input capacitance must be small (less
than 10% is recommended) in order to preventing accidentally
turning on the synchronous MOSFETs when the switch node
goes high.
Also, the time to switch the synchronous MOSFETs off should
not exceed the non-overlap dead time of the MOSFET driver
(40ns typical for the FAN5009). The output impedance of the
driver is approximately 2
, and the typical MOSFET input gate
resistances are about 1
to 2
. Therefore, the total gate capac-
itance should be less than 6000pF. In the event there are two
MOSFETs in parallel, the input capacitance for each synchro-
nous MOSFET should be limited to 3000pF.
The high-side (main) MOSFET power dissipation consists of
two elements: conduction and switching losses. The switching
loss is related to the main MOSFET’s turn on and off time, and
the current and voltage being switched. Based on the main
I
O
R
R
CS
----------------
V
R
L
-------------
×
=
C
CS
R
L
R
CS
---------------------
≥
R
PH x
( )
R
L
R
CS
I
V
DRPMAX
-----------------------
×
×
=
R
PH x
( )
1.4m
100k
110mV
-110A
×
×
140k
=
=
C
CS
1.4m
100k
------------600nH
4.29nF
≥
≥
V
OUT
R
------------------------------
R
+
(
)
R
B1
V
REF
×
=
R
B2
V
--------------------------------
V
–
V
REF
R
B1
×
=
R
B2
1.8V
0.8V
–
0.8V
1k
×
1.25k
=
=
P
SF
1
D
–
(
)
I
n
SF
--------
2
1
12
-----
n
-------------
I
R
×
n
SF
2
×
+
R
DS SF
)
×
×
=
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