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參數(shù)資料
| 型號(hào)： | FEDS82V48540-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 393,216-Word 】 32-Bit 】 4-Bank FIFO-SGRAM |
| 中文描述： | 393216詞】32位】4銀行先進(jìn)先出，SGRAM |
| 文件頁(yè)數(shù)： | 1/44頁(yè) |
| 文件大小： | 1419K |
| 代理商： | FEDS82V48540-01 |
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OKI Semiconductor
MS82V48540
393,216-Word
×
32-Bit
×
4-Bank FIFO-SGRAM
FEDS82V48540-01
Issue Date:Nov. 8, 2002
GENERAL DESCRIPTION
The MS82V48540 is a 48-Mbit system clock synchronous dynamic random access memory. In addition to the
conventional random read/write access function, the MS82V48540 provides the automatic row address increment
function and automatic bank switching function. Therefore, if once the row and column addresses are set,
continuous serial accesses are possible while banks are automatically switched till input of the Precharge
command. The MS82V48540 is ideal for digital camera and TV buffer memory applications.
FEATURES
393,216 words
×
32 bits
×
4 banks memory (1,536 rows
×
256 columns
×
32 bits
×
4 banks)
Single 3.3 V
±
0.3 V power supply
LVTTL compatible inputs and outputs
Programmable burst length (1, 2, 4, 8 and full page)
Programmable
CAS
latency (2, 3)
Automatic row address increment function and automatic bank switching function
Power Down operation and Clock Suspend operation
3,072 refresh cycles/64 ms
Auto refresh and self refresh capability
Package:
86-pin 400 mil plastic TSOP (II) (TSOPII86-P-400-0.50-K) (Product : MS82V48540-xTA)
PRODUCT FAMILY
Family
Max. Operating Frequency
MS82V48540-7
143 MHz
MS82V48540-8
125 MHz
1/44
x indicates speed rank.
Access Time
5 ns
6 ns
Package
86-pin Plastic TSOP (II) (400 mil)
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