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參數(shù)資料
| 型號(hào)： | FIN1101MX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | LVDS Single Port High Speed Repeater |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | 0.150 INCH, MS-012, SOIC-8 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 267K |
| 代理商： | FIN1101MX |
3
www.fairchildsemi.com
F
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3:
All typical values are at T
A
=
25
°
C and with V
CC
=
3.3V, V
ID
=
300mV, V
IC
=
1.2V unless otherwise specified.
Note 4:
t
SK(PP)
is the magnitude of the difference in differential propagation delay times between identical channels of two devices switching in the same
direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test cir-
cuits.
Note 5:
Passing criteria for maximum frequency is the output V
OD
>
200 mV and the duty cycle is 45% to 55% with all channels switching.
Note 6:
Output loading is transmission line environment only; C
L
is
<
1 pF of stray test fixture capacitance.
FIGURE 1. Differential Receiver Voltage Definitions and
Propagation I and Transition Time Test Circuit
FIGURE 2. Differential Driver DC Test Circuit
Note A: All LVDS input pulses have frequency
=
10MHz, t
R
or t
F
<
=
0.5 ns
Note B: C
L
includes all probe and test fixture capacitances
FIGURE 3. Differential Driver Propagation Delay and Transition Time Test Circuit
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
t
PLHD
Differential Propagation Delay
LOW-to-HIGH
0.75
1.1
1.75
ns
t
PHLD
Differential Propagation Delay
HIGH-to-LOW
Differential Output Rise Time (20% to 80%)
R
L
=
100
, C
L
=
5 pF,
V
ID
=
200 mV to 450 mV,
V
IC
=
|V
ID
|/2 to (V
CC
(V
ID
/2),
Duty Cycle
=
50%,
See Figure 3 and Figure 4
0.75
1.1
1.75
ns
t
TLHD
t
THLD
t
SK(P)
t
SK(PP)
f
MAX
t
PZHD
t
PZLD
t
PHZD
t
PLZD
t
DJ
0.29
0.40
0.58
ns
Differential Output Fall Time (80% to 20%)
Pulse Skew |t
PLH
- t
PHL
|
Part-to-Part Skew (Note 4)
0.29
0.40
0.01
0.58
0.2
0.5
ns
ns
ns
Maximum Frequency (Note 5)(Note 6)
Differential Output Enable Time from Z to HIGH
Differential Output Enable Time from Z to LOW
400
800
2.1
2.3
MHz
ns
ns
5
5
R
L
=
100
, C
L
=
5 pF,
Differential Output Disable Time from HIGH to Z See Figure 2 and Figure 3
Differential Output Disable Time from LOW to Z
LVDS Data Jitter,
1.5
1.8
5
5
ns
ns
V
ID
=
300 mV, PRBS
=
2
23
1,
V
IC
=
1.2V at 800 Mbps
V
ID
=
300 mV
V
IC
=
1.2 V at 400 MHz
85
135
ps
Deterministic
LVDS Clock Jitter, Random
(RMS)
t
RJ
2.1
3.5
ps
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| FIN1102MTC_Q | 功能描述:總線接收器 2 Port Repeater LVDS Hi Speed RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| FIN1102MTCX | 功能描述:緩沖器和線路驅(qū)動(dòng)器 2 Port Repeater LVDS Hi Speed RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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