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參數(shù)資料
| 型號： | FIN24AMLX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Voltage 24-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| 中文描述： | LINE TRANSCEIVER, QCC40 |
| 封裝： | 6 X 6 MM, LEAD FREE, MO-220, MLP-40 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大小： | 1758K |
| 代理商： | FIN24AMLX |
Preliminary
13
www.fairchildsemi.com
F
Control Logic Timing Controls
Capacitance
Symbol
t
PHL_DIR
,
t
PLH_DIR
t
PLZ
,
t
PHZ
t
PZL
,
t
PZH
t
PLZ
,
t
PHZ
t
PZL
,
t
PZH
t
PLZ
,
t
PHZ
t
PZL
,
t
PZH
Parameter
Test Conditions
Min
Typ
Max
Units
Propagation Delay
DIRI-to-DIRO
DIRI LOW-to-HIGH or HIGH-to-LOW
TBD
TBD
7.0
ns
Propagation Delay
DIRI-to-DP
Propagation Delay
DIRI LOW-to-HIGH
7.0
ns
DIRI HIGH-to-LOW
10.0
ns
DIRI-to-DP
Deserializer Disable Time:
S0 or S1 to DP
DIRI
0,
S1(2)
0 and S2(1)
LOW-to-HIGH
7.0
ns
Figure 26
Deserializer Enable Time:
S0 or S1 to DP
Serializer Disable Time:
DIRI
0,
S1(2)
0 and S2(1)
LOW-to-HIGH
DIRI
1,
10.0
ns
Figure 26
7.0
ns
S0 or S1 to CKSO, DS
Serializer Enable Time:
S0 or S1 to CKSO, DS
S1(2)
0 and S2(1)
HIGH-to-LOW
DIRI
1,
S1(2) and S2(1)
LOW-to-HIGH
Figure 25
10.0
ns
Figure 25
Symbol
C
IN
Parameter
Test Conditions
Min
Typ
Max
Units
Capacitance of Input Only Signals,
DIRI
1, S1
0,
TBD
pF
CKREF, STROBE, S1, S2, DIRI
Capacitance of Parallel Port Pins
DP
1:12
V
DD
2.5V
DIRI
1, S1
0,
V
DD
2.5V
C
IO
TBD
pF
C
IO-DIFF
Capacitance of Differential I/O Signals DIRI
0, PwnDwn
0;
TBD
pF
S1
0, V
DD
2.5V
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