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參數資料
| 型號： | FM3565MT20 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 標準邏輯 |
| 英文描述： | CPU CONFIGURATION CONTROLLER Register/Multiplexer for Microprocessor VID |
| 中文描述： | SPECIALTY LOGIC CIRCUIT, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數： | 6/7頁 |
| 文件大小： | 84K |
| 代理商： | FM3565MT20 |
6
www.fairchildsemi.com
F
R
FM3565 Rev. A.1
AC Characteristics
Symbol
Parameter
T
A
= 0
°
C to +70
°
C, C
L
= 30pF, R
L
= 500
V
CC
= 5.0V
±
0.5V
Min
Max
Units
V
CC
= 3.3V
±
0.3V
Min
Max
t
PHL
Prop Delay I to Y
50
50
ns
t
PLH
Prop Delay I to Y
50
50
ns
t
PHL
Prop Delay to Y (from OVRD or MUXSEL)
50
50
ns
t
PLH
Prop Delay to Y (from OVRD or MUXSEL)
50
50
ns
IIC AC Characteristics
Symbol
Parameter
T
A
= 0
°
C to +70
°
C,C
L
= 30pF, R
L
= 500
100kHz
Min
Max
Units
400kHz
Min
Max
f
SCL
SCL Clock Frequency
100
400
kHz
T
1
Noise Supression Time Constant
100
50
nS
t
AA
SCL Low to SDA Data Out Valid
0.3
3.5
0.1
0.9
μ
S
t
BUF
Time the Bus must be free before a new
Transmission can start
4.7
1.3
μ
S
t
HD:STA
Start Condition Hold Time
4.0
0.6
μ
S
t
LOW
Clock Low Period
4.7
0.6
μ
S
t
HIGH
Clock High Period
4.0
0.6
μ
S
t
SU:STA
Start Condition Setup Time (For a
repeated Start Condition)
4.7
0.6
t
HD:DAT
Data in Hold Time
0
0
μ
S
t
SU:DAT
Data in Setup Time
250
100
nS
t
R
SDA and SCL Rise Time
1000
300
nS
t
F
SDA and SCL Fall Time
300
300
nS
t
SU:STO
Stop Condition Setup Time
4.7
0.6
μ
S
Capacitance
Symbol
Parameter
Conditions
T
A
= +25
°
C Typical
6
Units
C
IN
Input Capacitance (I4-I0)
V
I
=0V or V
CC
, V
CC
=3.3 or 5.0
pF
C
I/O
Input/Output Capacitance (SDA)
V
I
=0V or V
CC
, V
CC
=3.3 or 5.0
7
pF
C
OUT
Output Capacitance (Y4-Y0)
7
pF
Non-Volatile Memory Characteristics
Parameter
Specification
Data Retention
10 years minimum
Number of writes
1,000,000 cycles
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