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參數資料
| 型號： | FM93CS46V |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | DRAM |
| 英文描述： | (MICROWIRE⑩ Bus Interface) 1024-Bit Serial EEPROM with Data Protect and Sequential Read |
| 中文描述： | （MICROWIRE的⑩總線接口），1024位串行EEPROM的數據保護和連續讀 |
| 文件頁數： | 1/16頁 |
| 文件大小： | 172K |
| 代理商： | FM93CS46V |
1
www.fairchildsemi.com
FM93CS46 Rev. C.1
F
w
July 2000
2000 Fairchild Semiconductor International
FM93CS46
(MICROWIRE Bus Interface) 1024-Bit Serial EEPROM
with Data Protect and Sequential Read
General Description
FM93CS46 is a 1024-bit CMOS non-volatile EEPROM organized
as 64 x 16-bit array. This device features MICROWIRE interface
which is a 4-wire serial bus with chipselect (CS), clock (SK), data
input (DI) and data output (DO) signals. This interface is compat-
ible to many of standard Microcontrollers and Microprocessors.
FM93CS46 offers programmable write protection to the memory
array using a special register called Protect Register. Selected
memory locations can be protected against write by programming
this Protect Register with the address of the first memory location
to be protected (all locations greater than or equal to this first
address are then protected from further change). Additionally, this
address can be “permanently locked” into the device, making all
future attempts to change data impossible. In addition this device
features “sequential read”, by which, entire memory can be read
in one cycle instead of multiple single byte read cycles. There are
10 instructions implemented on the FM93CS46, 5 of which are for
memory operations and the remaining 5 are for Protect Register
operations. This device is fabricated using Fairchild Semiconduc-
tor floating-gate CMOS process for high reliability, high endurance
and low power consumption.
“LZ” and “L” versions of FM93CS46 offer very low standby current
making them suitable for low power applications. This device is offered
in both SO and TSSOP packages for small space considerations.
Functional Diagram
Features
I
Wide V
CC
2.7V - 5.5V
I
Programmable write protection
I
Sequential register read
I
Typical active current of 200
μ
A
10
μ
A standby current typical
1
μ
A standby current typical (L)
0.1
μ
A standby current typical (LZ)
I
No Erase instruction required before Write instruction
I
Self timed write cycle
I
Device status during programming cycles
I
40 year data retention
I
Endurance: 1,000,000 data changes
I
Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
INSTRUCTION
DECODER
CONTROL LOGIC
AND CLOCK
GENERATORS
COMPARATOR
AND
WRITE ENABLE
HIGH VOLTAGE
GENERATOR
AND
PROGRAM
TIMER
INSTRUCTION
REGISTER
ADDRESS
REGISTER
PROTECT
REGISTER
EEPROM ARRAY
READ/WRITE AMPS
DATA IN/OUT REGISTER
16 BITS
DECODER
16
16
DATA OUT BUFFER
PRE
PE
CS
SK
DI
DO
V
SS
V
CC
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