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參數資料
| 型號： | FSA66P5X |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Low Voltage UHS Single SPST Normally Open Analog Switch |
| 中文描述： | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5 |
| 封裝： | 1.25 MM, LEAD FREE, EIAJ, SC-88A, SC-70, 5 PIN |
| 文件頁數： | 3/10頁 |
| 文件大小： | 122K |
| 代理商： | FSA66P5X |
3
www.fairchildsemi.com
F
AC Electrical Characteristics
Note 8:
All typical values are at the specified V
CC
, and T
A
=
25
°
C.
Note 9:
This parameter is guaranteed by design but is not tested. The switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Note 10:
Guaranteed by design.
Note 11:
Off Isolation
=
20 log
10
[V
A
/V
BN
].
Capacitance
T
A
=
40
°
C to
+
85
°
C,
C
L
=
50 pF, RU
=
RD
=
500
Min
Typ
(Note 8)
Symbol
Parameter
V
CC
(V)
Units
Conditions
Figure
Max
Number
t
PHL
, t
PLH
Propagation Delay Bus to Bus
1.65 to 1.95
4.3
Figures
1, 2
(Note 9)
2.3-2.7
3.0-3.6
4.5-5.5
1.2
0.8
0.3
ns
ns
ns
V
IN
=
OPEN
t
PZL
, t
PZH
Output Enable Time
1.65 to 1.95
2.3-2.7
3.0-3.6
1.5
1.5
1.5
7.0
3.3
2.4
14.2
7.0
5.5
Figures
1, 2
ns
ns
V
IN
=
2 x V
CC
for t
PZL
V
IN
=
0V for t
PZH
4.5-5.5
1.65 to 1.95
2.3-2.7
1.5
1.5
1.5
2.0
9.2
5.3
4.5
18.2
9.0
ns
t
PLZ
, t
PHZ
Output Disable Time
Figures
1, 2
ns
V
IN
=
2 x V
CC
for t
PLZ
V
IN
=
0V for t
PHZ
3.0-3.6
4.5-5.5
1.65-5.5
1.5
1.5
4.0
2.7
0.05
7.0
5.0
ns
ns
pC
Q
Charge Injection (Note 10)
C
L
=
0.1 nF, V
GEN
=
0V,
R
GEN
=
0
, f
=
1 MHz
R
L
=
50
, C
L
=
5 pF,
f
=
10 MHz
R
L
=
50
R
L
=
600
0.5 V
P-P
f
=
600 Hz to 20 KHz
Figure 3
OIRR
Off Isolation (Note 11)
1.65-5.5
50
dB
Figure 4
BW
THD
3dB Bandwidth
Total Harmonic Distortion
(Note 8)
1.65-5.5
>
250
MHz
Figure 5
5
.011
%
Symbol
Parameter
Typ
2
6
Max
Units
pF
pF
Conditions
V
CC
=
0V
V
CC
=
5.0V
C
IN
C
I/O
Control Pin Input Capacitance
Input/Output Capacitance
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相關代理商/技術參數 |
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|---|---|
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