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參數資料
型號: FSAM15SM60
廠商: Fairchild Semiconductor Corporation
英文描述: SPM (Smart Power Module) General Description
中文描述: 掃描探針顯微鏡(智能功率模塊)概述
文件頁數: 13/16頁
文件大小: 2338K
代理商: FSAM15SM60
2003 Fairchild Semiconductor Corporation
F
Rev. E, August 2003
Note:
1) It would be recommended that by-pass capacitors for the gating input signals, IN
, IN
, IN
(WL)
, IN
(UH)
, IN
(VH)
and IN
(WH)
should be placed on the SPM pins
and on the both sides of CPU and SPM for the fault output signal, V
FO
, as close as possible.
2) The logic input is compatible with standard CMOS or LSTTL outputs.
3) R
C
/R
C
/R
PF
C
PF
coupling at each SPM input is recommended in order to prevent input/output signals’ oscillation and it should be as close as possible to
each of SPM pins.
Fig. 13. Recommended CPU I/O Interface Circuit
Note:
It would be recommended that the bootstrap diode, D
BS
, has soft and fast recovery characteristics.
Fig. 14. Recommended Bootstrap Operation Circuit and Parameters
CPU
COM
5V-Line
1.2nF
0.47nF
1nF
4.7k
4.7k
,
,
IN
(UL)
IN
(VL)
IN
(WL)
,
,
IN
(UH)
IN
(VH)
IN
(WH)
V
FO
100
100
100
1nF
SPM
2k
R
PF
R
PL
R
PH
C
PF
C
PL
C
PH
15V-Line
20
33uF
0.1uF
470uF
0.1uF
One-Leg Diagram of SPM
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
OUT
Inverter
Output
P
N
These Values depend on PWM Control Algorithm
D
BS
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相關代理商/技術參數
參數描述
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