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參數資料
| 型號： | FSDM311L |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | Green Mode Fairchild Power Switch (FPS) |
| 中文描述： | 1.5 A SWITCHING REGULATOR, 73 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | LSOP-8 |
| 文件頁數： | 10/16頁 |
| 文件大小： | 377K |
| 代理商： | FSDM311L |
FSDM311
10
Functional Description
1. Startup
: At startup, the internal high voltage current
source supplies the internal bias and charges the external
Vcc capacitor as shown in Figure 4. In the case of the
FSDM311, when Vcc reaches 9V the device starts switching
and the internal high voltage current source is disabled. The
device continues to switch provided that Vcc does not drop
below 7V. After startup the bias is supplied from the auxil-
iary transformer winding.
Figure 4. Internal startup circuit
Calculating the Vcc capacitor is an important step to design-
ing in the FSDM311. At initial start-up in the FSDM311, the
stand-by maximum current is 100uA, supplying current to
UVLO and Vref Block. The charging current (i) of the Vcc
capacitor is equal to Istr - 100uA. After Vcc reaches the
UVLO start voltage only the bias winding supplies Vcc cur-
rent to device. When the bias winding voltage is not suffi-
cient, the Vcc level decreases to the UVLO stop voltage. At
this time Vcc oscillates. In order to prevent this ripple it is
recommended that the Vcc capacitor be sized between 10uF
and 47uF.
Figure 5. Charging the Vcc capacitor through Vstr
2. Feedback Control
: The FSDM311 are the voltage mode
devices as shown in Figure 6. Usually, an opto-coupler and
KA431 type voltage reference are used to implement the
feedback network. The feedback voltage is compared with
an internally generated sawtooth waveform. This directly
controls the duty cycle. When the KA431 reference pin volt-
age exceeds the internal reference voltage of 2.5V, the opto-
coupler LED current increase pulling down the feedback
voltage and reducing the duty cycle. This will happen when
the input voltage increases or the output load decreases.
3. Leading edge blanking (LEB)
: When the MOSFET is
turned on, there usually exists a high current spike through
the MOSFET. This is caused by primary side capacitance
and secondary side rectifier reverse recovery. This could
cause premature termination of the switching pulse if it
exceeded the over-current threshold. Therefore, the FPS
employs the leading edge blanking (LEB) circuit. This cir-
cuit inhibits the over current comparator for a short time
after the MOSFET is turned on.
Figure 6. PWM and feedback circuit
4. Protection Circuit
: The FSDM311 has 3self protection
functions: over-load protection (OLP), thermal shutdown
(TSD) and over-voltage protection. Because these protection
circuits are fully integrated into the IC with no external com-
ponents, system reliability is improved without cost increase.
If either of these functions are triggered, the FPS starts an
auto-restart cycle. Once the fault condition occurs, switching
is terminated and the MOSFET remains off. This cause Vcc
to fall. When Vcc reaches the UVLO stop voltage (7V), the
protection is reset and the internal high voltage current
source charges the Vcc capacitor. When Vcc reaches the
UVLO start voltage (9V), the device attempts to resume nor-
mal operation. If the fault condition is no longer present start
up will be successful. If it is still present the cycle is
repeated. This is shown in Figure 7.
Vin,dc
Vstr
Vcc
Istr
FSDM311
9V/
7V
L
H
Vin,dc
Vstr
Istr
J-FET
UVLO
Vref
max
current
i = Istr-max current
i = Istr-max current
FSDM311
Vcc
UVLO
start
UVLO
stop
t
Vcc
Vcc must not drop
to UVLO stop
Auxiliary winding
voltage
4
OSC
Vcc
Vref
5uA
0.40mA
V
SD
R
FB
Gate
driver
OLP
Vfb
KA431
Cfb
Vo
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